公开(公告)号：US4746625A

公开(公告)日：1988-05-24

申请号：US15037

申请日：1987-02-17

申请人： Sigeru Morita ,  Masakazu Kakumu

发明人： Sigeru Morita ,  Masakazu Kakumu

IPC分类号： H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L21/425 ,  H01L21/473

CPC分类号： H01L21/76216

摘要： A semiconductor manufacturing method which comprises the steps of forming a polycrystalline silicon layer on a semiconductor substrate; depositing a silicon oxide layer on the polycrystalline silicon layer; mounting an acidproof layer on the silicon oxide layer; selectively eliminating the acidproof layer deposited on a semiconductor element-isolating region by the photoetching process; selectively eliminating the silicon oxide layer with the retained acidproof layer used as a mask; ion implanting a channel stopper impurity in the semiconductor substrate through the masks formed of a photoresist coated on the acidproof layer the acidproof layer, and silicon oxide layer; eliminating the photoresist; selectively depositing a silicon layer on the exposed polycrystalline silicon; carrying out thermal oxidation with the acidproof layer used as a mask; eliminating the acidproof layer; filling an oxide in the cavities of the side walls of the semiconductor element-isolating insulation layer; and exposing by etching that portion of the semiconductor substrate which will constitute a semiconductor element region, thereby forming a thick semiconductor element-isolating layer with high precision in a narrow semiconductor element-isolating region.

摘要翻译： 一种半导体制造方法，包括以下步骤：在半导体衬底上形成多晶硅层; 在所述多晶硅层上沉积氧化硅层; 在氧化硅层上安装耐酸层; 选择性地消除通过光刻工艺沉积在半导体元件隔离区上的耐酸层; 选择性地除去用作掩模的保留的防酸层的氧化硅层; 离子通过由涂覆在耐酸层上的光致抗蚀剂形成的掩模和氧化硅层在半导体衬底中注入沟道阻挡杂质; 消除光刻胶; 在暴露的多晶硅上选择性地沉积硅层; 用作为掩模的耐酸层进行热氧化; 消除耐酸层; 在半导体元件隔离绝缘层的侧壁的空腔中填充氧化物; 通过蚀刻构成半导体元件区域的半导体基板的部分进行曝光，从而在窄半导体元件隔离区域中形成高精度的厚半导体元件隔离层。

公开(公告)号：US4721687A

公开(公告)日：1988-01-26

申请号：US11892

申请日：1987-02-06

申请人： Masakazu Kakumu ,  Sigeru Morita

发明人： Masakazu Kakumu ,  Sigeru Morita

IPC分类号： H01L21/316 ,  H01L21/70 ,  H01L21/76 ,  H01L21/762 ,  H01L21/94 ,  H01L21/95

CPC分类号： H01L21/76213 ,  Y10S148/117

摘要： A method of manufacturing a semiconductor substrate, and, in particular, a technique of electrically isolating a semiconductor element formed on a semiconductor substrate. The method comprises the steps of depositing a silicon oxide layer on the surface of a silicon substrate, for its protection; forming a silicon nitride layer on the silicon oxide layer; selectively eliminating the silicon nitride layer; oxidizing the silicon substrate, with the retained silicon nitride layer being used as a mask, thereby providing an oxide layer; depositing a polycrystalline silicon layer on the oxide layer and the retained acid-resisting layer; oxidizing the polycrystalline silicon layer to provide an insulation layer; eliminating the insulation layer until the silicon nitride layer is exposed; and removing all the silicon nitride layer. The method is capable of enabling the formation of a thick semiconductor element-isolating oxide layer, with a high precision, in a narrow region from which the semiconductor element is to be isolated.

摘要翻译： 一种制造半导体衬底的方法，特别是一种将半导体衬底上形成的半导体元件电隔离的技术。 该方法包括以下步骤：在硅衬底的表面上沉积氧化硅层以进行保护; 在所述氧化硅层上形成氮化硅层; 选择性地消除氮化硅层; 氧化硅衬底，将保留的氮化硅层用作掩模，由此提供氧化物层; 在氧化物层和保留的耐酸层上沉积多晶硅层; 氧化多晶硅层以提供绝缘层; 消除绝缘层，直到暴露氮化硅层; 并去除所有的氮化硅层。 该方法能够在要分离半导体元件的窄区域中以高精度形成厚半导体元件隔离氧化物层。

公开(公告)号：US4642881A

公开(公告)日：1987-02-17

申请号：US735211

申请日：1985-05-17

申请人： Naohiro Matsukawa ,  Sigeru Morita ,  Hiroshi Nozawa

发明人： Naohiro Matsukawa ,  Sigeru Morita ,  Hiroshi Nozawa

IPC分类号： H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L29/788 ,  G11C11/40 ,  H01L21/283

CPC分类号： H01L29/66825 ,  H01L21/26513 ,  H01L21/28273 ,  H01L29/7883 ,  Y10S148/082

摘要： A method of manufacturing a nonvolatile semiconductor memory device having a gate oxide layer including a relatively thin silicon dioxide layer. This gate oxide layer including the thin silicon dioxide layer is formed by the steps of forming the gate oxide film on a semiconductor element region in a silicon substrate; removing a portion of the gate oxide film to expose a portion of the silicon substrate; implanting impurity ions in the exposed portion of the substrate to an extent that a peak concentration of the impurity ions exceeds a solid solution limit at a temperature of the following thermal annealing step; activating the implanted impurity by thermal annealing so as to form a high impurity concentration layer and thermally oxidizing a surface of the high impurity concentration layer to form the thin silicon dioxide layer.

摘要翻译： 一种制造具有包括相对薄的二氧化硅层的栅氧化层的非易失性半导体存储器件的方法。 通过在硅衬底的半导体元件区域上形成栅氧化膜的步骤，形成包括二氧化硅薄层的栅极氧化层; 去除所述栅氧化膜的一部分以暴露所述硅衬底的一部分; 在杂质离子的峰值浓度在随后的热退火步骤的温度下超过固溶极限的程度将杂质离子注入衬底的暴露部分; 通过热退火激活注入的杂质，以便形成高杂质浓度层并热氧化高杂质浓度层的表面以形成薄的二氧化硅层。