公开(公告)号：US06909191B2

公开(公告)日：2005-06-21

申请号：US09816177

申请日：2001-03-26

申请人： Masaaki Hatano ,  Takamasa Usui

发明人： Masaaki Hatano ,  Takamasa Usui

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532 ,  H01L23/538 ,  H01L29/40 ,  H01L21/94

CPC分类号： H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05546 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided a semiconductor device comprising a Cu film provided above a main surface of a semiconductor substrate and used as a wiring, an intermediate layer formed at least on the Cu film, and an Al film formed on the intermediate layer and used as a pad, wherein the intermediate layer comprises a refractory metal nitride film and a refractory metal film formed on the refractory metal nitride film.

摘要翻译： 提供了一种半导体器件，其包括设置在半导体衬底的主表面上方并用作布线的Cu膜，至少形成在Cu膜上的中间层和形成在中间层上并用作衬垫的Al膜 其中，所述中间层包含难熔金属氮化物膜和在所述难熔金属氮化物膜上形成的难熔金属膜。

公开(公告)号：US4529621A

公开(公告)日：1985-07-16

申请号：US539729

申请日：1983-10-05

申请人： Delbert L. Ballard

发明人： Delbert L. Ballard

IPC分类号： H01F10/28 ,  H01F41/18 ,  H01L21/316 ,  H01L21/94

CPC分类号： H01F41/18 ,  H01F10/28

摘要： The present invention is directed to a process for depositing a thin-film layer of magnetic material onto an insulative dielectric layer of a semiconductor substrate such that the layer of magnetic material completely and permanently adheres to the insulative dielectric layer. A product within the scope of the present invention is prepared by taking a semiconductor substrate, such as a silicon wafer, and through a chemical-vapor deposition process depositing a layer of an insulative dielectric (such as the silicon dioxide or silicon nitride) on the layer, and subsequently depositing a layer of a magnetic material (such as a nickel-iron alloy or a manganese-bismuth alloy) through a sputtering process onto the insulative dielectric layer.

摘要翻译： 本发明涉及一种在半导体衬底的绝缘电介质层上沉积磁性材料的薄膜层的方法，使得该磁性材料层完全永久地附着在绝缘介质层上。 本发明范围内的产品是通过采取诸如硅晶片的半导体衬底，并通过在绝缘电介质层（例如二氧化硅或氮化硅）上沉积的化学气相沉积工艺来制备的 层，然后通过溅射工艺将一层磁性材料（例如镍 - 铁合金或锰 - 铋合金）沉积到绝缘电介质层上。

公开(公告)号：US3984588A

公开(公告)日：1976-10-05

申请号：US515604

申请日：1974-10-17

申请人： Erich Pammer

发明人： Erich Pammer

IPC分类号： H01L21/768 ,  H01L21/00 ,  H01L23/29 ,  H01L23/485 ,  H01L23/522 ,  H01L21/88 ,  H01L21/94

CPC分类号： H01L23/293 ,  H01L21/00 ,  H01L23/485 ,  H01L2924/0002 ,  Y10S438/928 ,  Y10S438/951

摘要： Semiconductor structures and a method of producing the same comprising coating the surface of a semiconductor body with a first inorganic insulating layer; coating an electrical conductor path on the first insulating layer; coating an organic layer which includes a compatible compound therein which vaporizes at a relatively low temperature onto select points or portions of the conductor path; coating a second inorganic insulating layer on all exposed surfaces of the conductor path, the organic layer and the first insulating layer; and heating the resulting structure to a temperature sufficient to vaporize the compatible compound within the organic layer and remove areas of the second insulating layer which superimposed the organic layer so as to unmask the select portions of the conductor path for access to external electrical connection means.

摘要翻译： 半导体结构及其制造方法，包括用第一无机绝缘层涂覆半导体本体的表面; 在所述第一绝缘层上涂覆电导体路径; 涂覆包括其中相容的化合物的有机层，其中相对低的温度蒸发到导体路径的选定点或部分上; 在导体路径，有机层和第一绝缘层的所有暴露表面上涂覆第二无机绝缘层; 并将所得结构加热到足以使有机层内的相容化合物蒸发的温度，并去除叠加有机层的第二绝缘层的区域，以便揭开用于接触外部电连接装置的导体路径的选择部分。

公开(公告)号：US4721687A

公开(公告)日：1988-01-26

申请号：US11892

申请日：1987-02-06

申请人： Masakazu Kakumu ,  Sigeru Morita

发明人： Masakazu Kakumu ,  Sigeru Morita

IPC分类号： H01L21/316 ,  H01L21/70 ,  H01L21/76 ,  H01L21/762 ,  H01L21/94 ,  H01L21/95

CPC分类号： H01L21/76213 ,  Y10S148/117

摘要： A method of manufacturing a semiconductor substrate, and, in particular, a technique of electrically isolating a semiconductor element formed on a semiconductor substrate. The method comprises the steps of depositing a silicon oxide layer on the surface of a silicon substrate, for its protection; forming a silicon nitride layer on the silicon oxide layer; selectively eliminating the silicon nitride layer; oxidizing the silicon substrate, with the retained silicon nitride layer being used as a mask, thereby providing an oxide layer; depositing a polycrystalline silicon layer on the oxide layer and the retained acid-resisting layer; oxidizing the polycrystalline silicon layer to provide an insulation layer; eliminating the insulation layer until the silicon nitride layer is exposed; and removing all the silicon nitride layer. The method is capable of enabling the formation of a thick semiconductor element-isolating oxide layer, with a high precision, in a narrow region from which the semiconductor element is to be isolated.

摘要翻译： 一种制造半导体衬底的方法，特别是一种将半导体衬底上形成的半导体元件电隔离的技术。 该方法包括以下步骤：在硅衬底的表面上沉积氧化硅层以进行保护; 在所述氧化硅层上形成氮化硅层; 选择性地消除氮化硅层; 氧化硅衬底，将保留的氮化硅层用作掩模，由此提供氧化物层; 在氧化物层和保留的耐酸层上沉积多晶硅层; 氧化多晶硅层以提供绝缘层; 消除绝缘层，直到暴露氮化硅层; 并去除所有的氮化硅层。 该方法能够在要分离半导体元件的窄区域中以高精度形成厚半导体元件隔离氧化物层。

公开(公告)号：US4597160A

公开(公告)日：1986-07-01

申请号：US763968

申请日：1985-08-09

申请人： Alfred C. Ipri

发明人： Alfred C. Ipri

IPC分类号： H01L29/78 ,  H01L21/20 ,  H01L21/205 ,  H01L21/265 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786 ,  H01L21/94 ,  H01L21/322

CPC分类号： H01L29/66757 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/78675 ,  Y10S148/118

摘要： A method for making a TFT comprises forming an amorphous silicon layer having a smooth upper surface. An insulating layer is then formed on the smooth surface at or below the critical temperature for the instantaneous crystallization of amorphous. This slowly converts the amorphous silicon to polycrystalline silicon while retaining the smooth surface. TFTs incorporating the invention have a relatively high field effect (surface) mobility.

摘要翻译： 制造TFT的方法包括形成具有光滑上表面的非晶硅层。 然后在光滑表面上形成绝缘层，其临界温度为或低于非晶态的瞬时结晶。 这将缓慢地将非晶硅转化成多晶硅，同时保持光滑表面。 结合本发明的TFT具有相对高的场效应（表面）迁移率。

公开(公告)号：US4597159A

公开(公告)日：1986-07-01

申请号：US706096

申请日：1985-02-27

申请人： Toshiro Usami ,  Yuuichi Mikata ,  Kazuyoshi Shinada

发明人： Toshiro Usami ,  Yuuichi Mikata ,  Kazuyoshi Shinada

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/02 ,  H01L21/34 ,  H01L21/76 ,  H01L21/94

CPC分类号： H01L21/28273 ,  Y10S148/053 ,  Y10S148/138 ,  Y10S148/169

摘要： A semiconductor device is manufactured by forming a first insulating film on a surface of a semiconductor substrate of a first conductivity type, and a first nonmonocrystalline silicon film is formed on the first insulating film. A second insulating film is deposited on the first nonmonocrystalline silicon film by CVD, sputtering or molecular beam method. An impurity is then ion-implanted in the first nonmonocrystalline silicon film through the second insulating film. The second insulating film is then removed to expose the surface of the first nonmonocrystalline silicon film doped with the impurity, and a thermal oxide film is formed on the exposed portion of the first nonmonocrystalline silicon film. Subsequently, a second nonmonocrystalline silicon film is formed on the thermal oxide film, and a third insulating film is formed on the second nonmonocrystalline silicon film.

摘要翻译： 通过在第一导电类型的半导体衬底的表面上形成第一绝缘膜，并且在第一绝缘膜上形成第一非单晶硅膜来制造半导体器件。 通过CVD，溅射或分子束方法将第二绝缘膜沉积在第一非单晶硅膜上。 然后通过第二绝缘膜将杂质离子注入到第一非单晶硅膜中。 然后去除第二绝缘膜以暴露掺杂有杂质的第一非单晶硅膜的表面，并且在第一非单晶硅膜的暴露部分上形成热氧化膜。 随后，在热氧化膜上形成第二非单晶硅膜，在第二非单晶硅膜上形成第三绝缘膜。

公开(公告)号：US4589193A

公开(公告)日：1986-05-20

申请号：US626278

申请日：1984-06-29

申请人： George R. Goth ,  Thomas A. Hansen ,  Robert T. Villetto, Jr.

发明人： George R. Goth ,  Thomas A. Hansen ,  Robert T. Villetto, Jr.

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L29/06 ,  H01L21/94

CPC分类号： H01L21/76237 ,  H01L29/0638 ,  Y10S148/019 ,  Y10S148/085 ,  Y10S148/086

摘要： Disclosed is the use of metal silicide (e.g. Pt-Si) contacts in boron lightly doped P.sup.- type silicon between two contiguous but not adjacent N.sup.+ type regions instead of employing the usual P.sup.+ implanted or diffused channel stoppers. The invention finds a particularly interesting application in polyimide filled deep trench isolated integrated circuits.The trench sidewalls are coated with an insulating material which is removed from the trench bottom at the all contact etch step. The Pt-Si is formed at the bottom of the trenches at the same time that the device contacts are made.

摘要翻译： 公开了在两个相邻但不相邻的N +型区域之间的硼轻掺杂的P型硅中使用金属硅化物（例如Pt-Si）触点，而不是采用通常的P +注入或扩散的通道阻塞。 本发明在聚酰亚胺填充的深沟隔离集成电路中发现特别有趣的应用。 沟槽侧壁涂有绝缘材料，绝缘材料在全部接触蚀刻步骤中从沟槽底部移除。 在制造器件接触的同时，在沟槽的底部形成Pt-Si。

公开(公告)号：US4551910A

公开(公告)日：1985-11-12

申请号：US675128

申请日：1984-11-27

申请人： Elizabeth L. Patterson

发明人： Elizabeth L. Patterson

IPC分类号： H01L21/76 ,  H01L21/316 ,  H01L21/318 ,  H01L21/32 ,  H01L21/762 ,  H01L21/94

CPC分类号： H01L21/76221 ,  H01L21/3185 ,  H01L21/32 ,  Y10S148/117

摘要： A process for growing field oxide regions in an MOS circuit. An initial thermally grown layer of silicon nitride seals the substrate surface and reduces lateral oxidation, or bird's beak formation along the substrate-nitride interface. Field oxidation takes place in two steps, with the first step being a dry oxidation in HCL and the second taking place in steam.

摘要翻译： 一种在MOS电路中生长场氧化物区域的方法。 氮化硅的初始热生长层密封衬底表面并减少侧向氧化，或沿着衬底 - 氮化物界面的鸟嘴形成。 场氧化分两步进行，第一步是在HCL中干燥氧化，第二步在蒸汽中进行。

公开(公告)号：US06867080B1

公开(公告)日：2005-03-15

申请号：US10460165

申请日：2003-06-13

申请人： Eric N. Paton ,  Robert B. Ogle ,  Cyrus E. Tabery ,  Qi Xiang ,  Bin Yu

发明人： Eric N. Paton ,  Robert B. Ogle ,  Cyrus E. Tabery ,  Qi Xiang ,  Bin Yu

IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/28 ,  H01L21/321 ,  H01L21/8234 ,  H01L21/338 ,  H01L21/331 ,  H01L21/94

CPC分类号： H01L21/28176 ,  H01L21/2026 ,  H01L21/268 ,  H01L21/28035 ,  H01L21/321 ,  H01L21/823437 ,  Y10S438/926

摘要： A method is provided for eliminating uneven heating of substrate active areas during laser thermal annealing (LTA) due to variations in gate electrode density. Embodiments include adding dummy structures, formed simultaneously with the gate electrodes, to “fill in” the spaces between isolated gate electrodes, such that the spacing between the gate electrodes and the dummy structures is the same as the spacing between the densest array of device structures on the substrate surface. Since the surface features (i.e., the gate electrodes and the dummy structures) appear substantially uniform to the LTA laser, the laser radiation is uniformly absorbed by the substrate, and the substrate surface is evenly heated.

摘要翻译： 提供了一种用于消除激光热退火（LTA）期间基板有源区的不均匀加热的方法，这是由于栅电极密度的变化。 实施例包括添加与栅电极同时形成的虚拟结构以“填充”隔离栅电极之间的空间，使得栅电极和虚拟结构之间的间隔与器件结构最密集阵列之间的间隔相同 在基板表面上。 由于表面特征（即，栅电极和虚拟结构）对于LTA激光器而言基本上均匀，激光辐射被基板均匀地吸收，并且基板表面被均匀地加热。

公开(公告)号：US5902128A

公开(公告)日：1999-05-11

申请号：US733660

申请日：1996-10-17

申请人： Viju K. Mathews ,  Nanseng Jeng ,  Pierre C. Fazan

发明人： Viju K. Mathews ,  Nanseng Jeng ,  Pierre C. Fazan

IPC分类号： H01L21/762 ,  H01L21/94 ,  H01L21/76

CPC分类号： H01L21/76202

摘要： A method of forming isolation structures in semiconductor substrates comprising exposing a region of the semiconductor simultaneously to a transforming agent and to a viscosity reducing agent so that the transforming agent transforms a portion of the substrate into an isolation structure and the viscosity reducing agent reduces the viscosity of the isolation structure during formation. In one embodiment, a silicon substrate is exposed to oxygen in the presence of fluorine so that a silicon oxide isolation region is formed. The fluorine reduces the viscosity of the silicon oxide isolation region during formation which results in less lateral, bird's beak encroachment under adjacent masking stacks and also results in lower internal stress in the isolation region during formation. The lower internal stress and the lessened lateral encroachment result in thicker and improved isolation regions.