Enhanced linearity, low switching perturbation resistor string matrices
    1.
    发明授权
    Enhanced linearity, low switching perturbation resistor string matrices 有权
    增强的线性度,低开关扰动电阻串矩阵

    公开(公告)号:US06507272B1

    公开(公告)日:2003-01-14

    申请号:US09915464

    申请日:2001-07-26

    IPC分类号: H01L101

    摘要: Enhanced linearity, low switching perturbation resistor string matrices. The resistor strings are arranged in an array of a plurality of rows of resistive elements and electrically arranged with rows equally spaced above and below the physical centerline of the array being coupled together in an opposite sense. Preferably also physically adjacent rows are equally spaced from the center of the electrical order of rows. This connection prevents accumulation of errors due to vertical and horizontal resistance gradients over the array. Also node selection by controlling node select transistors coupled to column select lines to select one node in each row, and also controlling row select transistors to select the row of the desired node minimizes settling time after a tap change by inducing equal and opposite voltage changes at points close together along the resistor string, whether in the array of the present invention or in the snake configuration.

    摘要翻译: 增强的线性度,低开关扰动电阻串矩阵。 电阻器串被布置成多行电阻元件的阵列,并且电排列成与阵列的物理中心线的上方和下方相等的间隔以相反的意义耦合在一起。 优选地,物理上相邻的行与电排列的中心等距地间隔开。 这种连接可防止阵列上的垂直和水平电阻梯度引起的误差累积。 还通过控制节点选择晶体管来选择耦合到列选择线以选择每行中的一个节点,并且还控制行选择晶体管以选择所需节点的行,通过在抽头变换之后引起相等且相反的电压变化来最小化最小化稳定时间 无论是在本发明的阵列中还是在蛇形结构中,沿着电阻串一起靠近的点。

    Resistor array board
    2.
    发明授权

    公开(公告)号:US06392530B1

    公开(公告)日:2002-05-21

    申请号:US09866711

    申请日:2001-05-30

    申请人: Etsuji Suzuki

    发明人: Etsuji Suzuki

    IPC分类号: H01L101

    摘要: A plurality of protective resistors can be easily inserted between circuit forming elements, and opposite ends of each protective resistor can be properly press-contacted to each circuit forming element. The protective resistor can be easily replaced when broken. A resistor array board comprises a porous plate having a plurality of through-holes arranged in array and opening at opposite surfaces thereof; and a plurality of protective resistors removably loosely inserted into the through-holes, respectively. Each of the protective resistors are resiliently retained by an electrically conductive spring element, and opposite ends of each of the protective resistors are press-contacted with the circuit forming elements which are arranged in opposing relation on surfaces of the porous plates.

    Ball grid array resistor network
    3.
    发明授权
    Ball grid array resistor network 有权
    球栅阵列电阻网络

    公开(公告)号:US06326677B1

    公开(公告)日:2001-12-04

    申请号:US09146826

    申请日:1998-09-04

    IPC分类号: H01L101

    摘要: A ball grid array resistor network has a substrate that has top and bottom surfaces. Resistors are disposed on the top surface. Conductors are disposed on the top surface, and each conductor is electrically connected to an end of each resistor. Vias extend through the substrate and are electrically connected to the conductors. Solder spheres are disposed on the bottom surface, and are electrically connected to the vias. A cover coat is disposed over the conductors and resistors. In an alternative embodiment, the vias are eliminated and the resistor network is formed on the bottom surface of the substrate. The resistor network provides a high density of resistors per unit area.

    摘要翻译: 球栅阵列电阻网络具有具有顶表面和底表面的基底。 电阻器设置在顶表面上。 导体设置在顶表面上,并且每个导体电连接到每个电阻器的一端。 通孔延伸穿过基板并与导体电连接。 焊球设置在底表面上,并且电连接到通孔。 导体和电阻器上设置覆盖层。 在替代实施例中,消除了通孔,并且电阻网络形成在衬底的底表面上。 电阻网络提供每单位面积的高密度电阻。