公开(公告)号：US20100140747A1

公开(公告)日：2010-06-10

申请号：US12592924

申请日：2009-12-04

申请人： Seung-Man Choi ,  Soon-Sik Hwang ,  Ki-Chul Park ,  Gi-Bum Kim ,  Ki-Su Kim ,  Sang-Chul Lee ,  Bae-Kyoung Kim

发明人： Seung-Man Choi ,  Soon-Sik Hwang ,  Ki-Chul Park ,  Gi-Bum Kim ,  Ki-Su Kim ,  Sang-Chul Lee ,  Bae-Kyoung Kim

IPC分类号： H01L23/58 ,  H01L23/522 ,  H01L21/768

CPC分类号： H01L23/585 ,  H01L24/02 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042

摘要： In a method of manufacturing a semiconductor device, a pad including at least one insulating interlayer and at least one conductive wiring may be formed in a pad area of a substrate. At least one wiring may be formed adjacent to the conductive wiring. At least one insulation layer may be formed adjacent to the insulating interlayer. At least one crack preventing structure may be formed in the insulation layer. The crack preventing structure may continuously extend in the insulation layer and portions of the insulation layer may also be continuous. When a semiconductor device includes at least one crack preventing structure disposed adjacent to a pad, a degradation of the semiconductor chip caused by an external impact and/or a stress may be efficiently prevented by the crack preventing structure.

摘要翻译： 在制造半导体器件的方法中，可以在衬底的焊盘区域中形成包括至少一个绝缘中间层和至少一个导电布线的焊盘。 可以在导电布线附近形成至少一个布线。 可以在绝缘中间层附近形成至少一个绝缘层。 至少一个防裂结构可以形成在绝缘层中。 防裂结构可以在绝缘层中连续延伸，并且绝缘层的部分也可以是连续的。 当半导体器件包括邻近焊盘设置的至少一个防裂结构时，可以通过防裂结构有效地防止由外部冲击和/或应力引起的半导体芯片的劣化。

公开(公告)号：US20100001186A1

公开(公告)日：2010-01-07

申请号：US12483997

申请日：2009-06-12

申请人： Soon-sik HWANG ,  Byung-sam Choi ,  Ki-chul Park

发明人： Soon-sik HWANG ,  Byung-sam Choi ,  Ki-chul Park

IPC分类号： G01N23/04

CPC分类号： H01J37/153 ,  H01J37/21 ,  H01J37/265 ,  H01J2237/1534 ,  H01J2237/216 ,  H01J2237/2826

摘要： A method of measuring a dimension of a measurement pattern by using a scanning electron microscope is provided. The method of measuring the dimension of the pattern includes: (a) moving to a correction pattern that is adjacent to the measurement pattern. The correction pattern comprises circular patterns to correct focus and/or stigmatism of the scanning electron microscope with respect to the correction pattern. The method further includes (b) measuring the dimension of the measurement pattern under measurement conditions to which the corrected focus and/or the stigmatism are reflected.

摘要翻译： 提供了通过使用扫描电子显微镜测量测量图案的尺寸的方法。 测量图案的尺寸的方法包括：（a）移动到与测量图案相邻的校正图案。 校正图案包括用于校正扫描电子显微镜相对于校正图案的焦点和/或斑点的圆形图案。 该方法还包括（b）在校正的焦点和/或标志被反映的测量条件下测量测量图案的尺寸。