公开(公告)号：US07379005B2

公开(公告)日：2008-05-27

申请号：US11516383

申请日：2006-09-06

申请人： Andreas Wiesbauer ,  Luis Hernandez ,  Dietmar Sträussnigg ,  Daniel Gruber ,  Richard Gaggl ,  Martin Clara ,  Stefan Matschitsch

发明人： Andreas Wiesbauer ,  Luis Hernandez ,  Dietmar Sträussnigg ,  Daniel Gruber ,  Richard Gaggl ,  Martin Clara ,  Stefan Matschitsch

IPC分类号： H03M1/66

CPC分类号： H03L7/08 ,  H03L7/18 ,  H03M3/372 ,  H03M3/464

摘要： Clock signal jitter detection circuit for detecting a clock signal jitter in a reference clock signal (CLK), having a switched-capacitor reference digital-analogue converter (15) which is clocked by the reference clock signal (CLK) and which converts a digital input signal into a first current, a current-controlled digital-analogue converter (16) which is clocked by the reference clock signal (CLK) and which converts the digital input signal into a second current, and having a current integrator (18) which integrates the difference between the first current and the second current to produce a signal which indicates the clock signal jitter in the reference clock signal (CLK).

摘要翻译： 用于检测参考时钟信号（CLK）中的时钟信号抖动的时钟信号抖动检测电路，具有由参考时钟信号（CLK）计时的开关电容器参考数模转换器（15），并转换数字输入 信号转换为第一电流，电流控制的数模转换器（16），其由参考时钟信号（CLK）计时，并将数字输入信号转换为第二电流，并具有积分器（18） 第一电流和第二电流之间的差异，以产生指示参考时钟信号（CLK）中的时钟信号抖动的信号。

公开(公告)号：US20070057830A1

公开(公告)日：2007-03-15

申请号：US11516383

申请日：2006-09-06

申请人： Andreas Wiesbauer ,  Luis Hernandez ,  Dietmar Straussnigg ,  Daniel Gruber ,  Richard Gaggl ,  Martin Clara ,  Stefan Matschitsch

发明人： Andreas Wiesbauer ,  Luis Hernandez ,  Dietmar Straussnigg ,  Daniel Gruber ,  Richard Gaggl ,  Martin Clara ,  Stefan Matschitsch

IPC分类号： H03L7/00

CPC分类号： H03L7/08 ,  H03L7/18 ,  H03M3/372 ,  H03M3/464

摘要： Clock signal jitter detection circuit for detecting a clock signal jitter in a reference clock signal (CLK), having a switched-capacitor reference digital-analogue converter (15) which is clocked by the reference clock signal (CLK) and which converts a digital input signal into a first current, a current-controlled digital-analogue converter (16) which is clocked by the reference clock signal (CLK) and which converts the digital input signal into a second current, and having a current integrator (18) which integrates the difference between the first current and the second current to produce a signal which indicates the clock signal jitter in the reference clock signal (CLK).

摘要翻译： 用于检测参考时钟信号（CLK）中的时钟信号抖动的时钟信号抖动检测电路，具有由参考时钟信号（CLK）计时的开关电容器参考数模转换器（15），并转换数字输入 信号转换为第一电流，电流控制的数模转换器（16），其由参考时钟信号（CLK）计时，并将数字输入信号转换为第二电流，并具有积分器（18） 第一电流和第二电流之间的差异，以产生指示参考时钟信号（CLK）中的时钟信号抖动的信号。