Recovery scheme for an emulated memory system
    1.
    发明授权
    Recovery scheme for an emulated memory system 有权
    仿真存储系统的恢复方案

    公开(公告)号:US08438327B2

    公开(公告)日:2013-05-07

    申请号:US12826814

    申请日:2010-06-30

    IPC分类号: G06F13/00

    摘要: A system includes an emulation memory having a first sector of non-volatile memory for storing information, in which the non-volatile memory includes a plurality of records. It is determined if a last record written of the plurality of records is a compromised record, if the last record written is not a compromised record, a next write is performed to a record of the plurality of records that is next to the last record written. If the last record written is a comprised record, an address of the compromised record is determined, valid data for the address of the compromised record is written into the record of the plurality of records that is next to the compromised record, and data is written into a record that is next to the record of the plurality of records that is next to the compromised record.

    摘要翻译: 一种系统包括具有用于存储信息的非易失性存储器的第一扇区的仿真存储器,其中非易失性存储器包括多个记录。 确定写入多个记录的最后记录是否是受损的记录。 如果写入的最后一条记录不是受损记录,则对写入的最后一条记录旁边的多条记录的记录执行下一次写入。 如果写入的最后一条记录是包含的记录,则确定受损记录的地址,将受感染记录的地址的有效数据写入被泄密记录旁边的多个记录的记录中,并写入数据 记录在与受损记录旁边的多个记录的记录旁边。

    READ CONDITIONS FOR A NON-VOLATILE MEMORY (NVM)
    2.
    发明申请
    READ CONDITIONS FOR A NON-VOLATILE MEMORY (NVM) 有权
    阅读非挥发性记忆条件(NVM)

    公开(公告)号:US20120176844A1

    公开(公告)日:2012-07-12

    申请号:US12985724

    申请日:2011-01-06

    IPC分类号: G11C16/06

    摘要: A method and memory are provided for determining a read reference level for a plurality of non-volatile memory cells. The method includes: performing a program operation of the plurality of non-volatile memory cells; determining a program level of a least programmed memory cell of the plurality of memory cells; performing an erase operation of the plurality of non-volatile memory cells; determining an erase level of a least erased memory cell of the plurality of memory cells; determining an operating window between the program level and the erase level; and setting the read reference level to be a predetermined offset from the erase level if the operating window is determined to compare favorably to a predetermined value. The memory includes registers for storing the program level and the erase level.

    摘要翻译: 提供了一种用于确定多个非易失性存储器单元的读取参考电平的方法和存储器。 该方法包括:执行多个非易失性存储单元的编程操作; 确定所述多个存储器单元中的最小程序存储单元的程序级; 执行所述多个非易失性存储单元的擦除操作; 确定所述多个存储器单元中最少擦除的存储单元的擦除电平; 确定程序级和擦除级之间的操作窗口; 并且如果确定操作窗口与预定值相比较,则将读取参考电平设置为与擦除电平的预定偏移。 存储器包括用于存储程序电平和擦除电平的寄存器。

    METHOD AND CIRCUIT FOR BROWNOUT DETECTION IN A MEMORY SYSTEM
    3.
    发明申请
    METHOD AND CIRCUIT FOR BROWNOUT DETECTION IN A MEMORY SYSTEM 有权
    用于存储器系统中欠压检测的方法和电路

    公开(公告)号:US20100306604A1

    公开(公告)日:2010-12-02

    申请号:US12473934

    申请日:2009-05-28

    IPC分类号: G11C29/04 G06F11/22 G06F12/00

    CPC分类号: G11C5/143

    摘要: Detecting brown-out in a system having a non-volatile memory (NVM) includes loading data in the NVM, wherein a next step in loading is performed on a location in the NVM that is logically sequential to an immediately preceding loading. A pair of adjacent locations include one with possible data and another that is empty. Determining which of the two, if at all, have experienced brownout includes using two different sense references. One has a higher standard for detecting a logic high and the other higher standard for detecting a logic low. Results from using the two different references are compared. If the results are the same for both references, then there is no brownout. If the results are different for either there has been a brownout. The location with the different results is set to an invalid state as the location that has experienced the brownout.

    摘要翻译: 在具有非易失性存储器(NVM)的系统中检测欠压包括在NVM中加载数据,其中在NVM中对逻辑上与先前加载相关的位置执行下一步加载。 一对相邻的位置包括一个可能的数据,另一个是空的。 确定二者中的哪一个(如果有的话)遇到掉电包括使用两种不同的意义引用。 一个具有更高的检测逻辑高的标准,另一个更高的标准用于检测逻辑低电平。 比较使用两种不同参考文献的结果。 如果两个参考文献的结果是一样的,那么没有掉电。 如果结果是不同的,或者是出现了一个掉电。 具有不同结果的位置设置为无效状态作为经历了掉电的位置。

    SEMICONDUCTOR DEVICE HAVING A TEST CONTROLLER AND METHOD OF OPERATION
    4.
    发明申请
    SEMICONDUCTOR DEVICE HAVING A TEST CONTROLLER AND METHOD OF OPERATION 有权
    具有测试控制器的半导体器件和操作方法

    公开(公告)号:US20150310932A1

    公开(公告)日:2015-10-29

    申请号:US14264473

    申请日:2014-04-29

    IPC分类号: G11C29/38

    摘要: A semiconductor device includes a test port configured to communicate with a test system, a test command controller coupled to communicate with the test port, a peripheral module configured to communicate with the test command controller, a processor, and a test memory configured to communicate with the test command controller and the processor. The test command controller is configured to issue a first set of one or more instructions to test the peripheral module and to issue a second set of one or more instructions to the processor to process information in the test memory resulting from the test of the peripheral module.

    摘要翻译: 半导体器件包括被配置为与测试系统进行通信的测试端口,被耦合以与测试端口通信的测试命令控制器,配置成与测试命令控制器通信的外围模块,处理器和被配置为与 测试命令控制器和处理器。 测试命令控制器被配置为发出第一组一个或多个指令以测试外围模块,并向处理器发出第二组一个或多个指令,以处理测试存储器中由外围模块测试得到的信息 。

    Non-volatile memory device and method therefor
    5.
    发明授权
    Non-volatile memory device and method therefor 有权
    非易失性存储器件及其方法

    公开(公告)号:US08255616B2

    公开(公告)日:2012-08-28

    申请号:US12685856

    申请日:2010-01-12

    IPC分类号: G06F12/00

    摘要: A method of storing information at a non-volatile memory includes storing a first status bit at a sector header of the memory prior to erasing a sector at the memory. A second status bit is stored after erasing of the sector. Because the erasure of the sector is interleaved with the storage of the status bits, a brownout or other corrupting event during erasure of the record will likely result in a failure to store the second status bit. Therefore, the first and second status bits can be compared to determine if the data was properly erased at the non-volatile memory. Further, multiple status bits can be employed to indicate the status of other memory sectors, so that a difference in the status bits for a particular sector can indicate a brownout or other corrupting event.

    摘要翻译: 在非易失性存储器处存储信息的方法包括在擦除存储器上的扇区之前将第一状态位存储在存储器的扇区头部。 擦除扇区后存储第二个状态位。 由于扇区的擦除与状态位的存储交错,所以在擦除记录期间的掉电或其他破坏事件可能导致存储第二状态位的故障。 因此,可以比较第一和第二状态位以确定数据是否在非易失性存储器处被正确擦除。 此外,可以采用多个状态位来指示其他存储器扇区的状态,使得特定扇区的状态位的差异可以指示掉电或其他破坏事件。

    RECOVERY SCHEME FOR AN EMULATED MEMORY SYSTEM
    6.
    发明申请
    RECOVERY SCHEME FOR AN EMULATED MEMORY SYSTEM 有权
    用于仿真存储器系统的恢复方案

    公开(公告)号:US20120005403A1

    公开(公告)日:2012-01-05

    申请号:US12826814

    申请日:2010-06-30

    IPC分类号: G06F12/02 G06F12/00

    摘要: In a system having an emulation memory having a first sector of non-volatile memory for storing information, wherein the non-volatile memory includes a plurality of records, a method includes determining if a last record written of the plurality of records is a compromised record; if the last record written is not a compromised record, performing a next write to a record of the plurality of records that is next to the last record written; and if the last record written is a comprised record: determining an address of the compromised record; writing valid data for the address of the compromised record into the record of the plurality of records that is next to the compromised record; and writing data into a record that is next to the record of the plurality of records that is next to the compromised record.

    摘要翻译: 在具有模拟存储器的系统中,具有用于存储信息的非易失性存储器的第一扇区,其中所述非易失性存储器包括多个记录,所述方法包括确定所述多个记录中写入的最后记录是否是受损记录 ; 如果写入的最后一个记录不是受损记录,则对写入的最后记录旁边的多个记录执行下一次写入; 并且如果写入的最后一个记录是包含的记录:确定受损记录的地址; 将受损记录的地址的有效数据写入到被破坏的记录旁边的多个记录的记录中; 并将数据写入与所述受损记录旁边的所述多个记录的记录相邻的记录。

    Non-volatile memory controller device and method therefor
    7.
    发明授权
    Non-volatile memory controller device and method therefor 有权
    非易失性存储器控制器及其方法

    公开(公告)号:US08271719B2

    公开(公告)日:2012-09-18

    申请号:US12608541

    申请日:2009-10-29

    IPC分类号: G06F12/00

    CPC分类号: G06F11/08

    摘要: A method of storing information at a non-volatile memory includes storing a status bit prior to storing data at the memory. A second status bit is stored after storing of the data. Because the storage of data is interleaved with the storage of the status bits, a brownout or other corrupting event during storage of the data will likely result in a failure to store the second status bit. Therefore, the first and second status bits can be compared to determine if the data was properly stored at the non-volatile memory.

    摘要翻译: 在非易失性存储器处存储信息的方法包括在将数据存储在存储器之前存储状态位。 存储数据后存储第二个状态位。 由于数据的存储与状态位的存储交错,因此在存储数据期间的掉电或其他损坏的事件可能导致存储第二状态位的故障。 因此,可以比较第一和第二状态位以确定数据是否被适当地存储在非易失性存储器中。

    Method and circuit for brownout detection in a memory system
    8.
    发明授权
    Method and circuit for brownout detection in a memory system 有权
    存储器系统中掉电检测的方法和电路

    公开(公告)号:US08010854B2

    公开(公告)日:2011-08-30

    申请号:US12473934

    申请日:2009-05-28

    IPC分类号: G11C29/00

    CPC分类号: G11C5/143

    摘要: Detecting brown-out in a system having a non-volatile memory (NVM) includes loading data in the NVM, wherein a next step in loading is performed on a location in the NVM that is logically sequential to an immediately preceding loading. A pair of adjacent locations include one with possible data and another that is empty. Determining which of the two, if at all, have experienced brownout includes using two different sense references. One has a higher standard for detecting a logic high and the other higher standard for detecting a logic low. Results from using the two different references are compared. If the results are the same for both references, then there is no brownout. If the results are different for either there has been a brownout. The location with the different results is set to an invalid state as the location that has experienced the brownout.

    摘要翻译: 在具有非易失性存储器(NVM)的系统中检测欠压包括在NVM中加载数据,其中在NVM中对逻辑上与先前加载相关的位置执行下一步加载。 一对相邻的位置包括一个可能的数据,另一个是空的。 确定二者中的哪一个(如果有的话)遇到掉电包括使用两种不同的意义引用。 一个具有更高的检测逻辑高的标准,另一个更高的标准用于检测逻辑低电平。 比较使用两种不同参考文献的结果。 如果两个参考文献的结果是一样的,那么没有掉电。 如果结果是不同的,或者是出现了一个掉电。 具有不同结果的位置设置为无效状态作为经历了掉电的位置。

    Semiconductor device having a test controller and method of operation
    9.
    发明授权
    Semiconductor device having a test controller and method of operation 有权
    具有测试控制器和操作方法的半导体器件

    公开(公告)号:US09412467B2

    公开(公告)日:2016-08-09

    申请号:US14264473

    申请日:2014-04-29

    IPC分类号: G11C29/38 G11C29/02 G11C29/16

    摘要: A semiconductor device includes a test port configured to communicate with a test system, a test command controller coupled to communicate with the test port, a peripheral module configured to communicate with the test command controller, a processor, and a test memory configured to communicate with the test command controller and the processor. The test command controller is configured to issue a first set of one or more instructions to test the peripheral module and to issue a second set of one or more instructions to the processor to process information in the test memory resulting from the test of the peripheral module.

    摘要翻译: 半导体器件包括被配置为与测试系统进行通信的测试端口,被耦合以与测试端口通信的测试命令控制器,配置成与测试命令控制器通信的外围模块,处理器和被配置为与 测试命令控制器和处理器。 测试命令控制器被配置为发出第一组一个或多个指令以测试外围模块,并向处理器发出第二组一个或多个指令,以处理测试存储器中由外围模块测试得到的信息 。

    Read conditions for a non-volatile memory (NVM)
    10.
    发明授权
    Read conditions for a non-volatile memory (NVM) 有权
    读取非易失性存储器(NVM)的条件

    公开(公告)号:US08310877B2

    公开(公告)日:2012-11-13

    申请号:US12985724

    申请日:2011-01-06

    IPC分类号: G11C16/04

    摘要: A method and memory are provided for determining a read reference level for a plurality of non-volatile memory cells. The method includes: performing a program operation of the plurality of non-volatile memory cells; determining a program level of a least programmed memory cell of the plurality of memory cells; performing an erase operation of the plurality of non-volatile memory cells; determining an erase level of a least erased memory cell of the plurality of memory cells; determining an operating window between the program level and the erase level; and setting the read reference level to be a predetermined offset from the erase level if the operating window is determined to compare favorably to a predetermined value. The memory includes registers for storing the program level and the erase level.

    摘要翻译: 提供了一种用于确定多个非易失性存储器单元的读取参考电平的方法和存储器。 该方法包括:执行多个非易失性存储单元的编程操作; 确定所述多个存储器单元中的最小程序存储单元的程序级; 执行所述多个非易失性存储单元的擦除操作; 确定所述多个存储器单元中最少擦除的存储单元的擦除电平; 确定程序级和擦除级之间的操作窗口; 并且如果确定操作窗口与预定值相比较,则将读取参考电平设置为与擦除电平的预定偏移。 存储器包括用于存储程序电平和擦除电平的寄存器。