摘要:
A high voltage drive circuit includes an edge detector for generating an edge detection signal by detecting edges of a first high side input signal and a first low side input signal, the edge detector providing a high side delay signal and a low side delay signal by delaying the first high side input signal and the first low side input signal, a dead time generator for generating a dead time signal indicating a preset dead time in response to the edge detection signal, and a driver comprising a drive signal generator for providing a high side output signal and a low side output signal by inserting the preset dead time based on the dead time signal into the high side delay signal and the low side delay signal.
摘要:
An apparatus and method for detecting program plagiarism through memory access log analysis is provided. A data extractor extracts an access log of an original program and an access log of a target program to be compared with the original program from a memory accessed by the programs. A common string detector enumerates values, which are obtained from the access logs extracted from the original program and the target program, into strings and detects a common string that commonly exists in the strings. A discontinuity calculator calculates a discontinuity value that indicates a distance between the strings by using an array of the detected common strings. A plagiarism determining unit determines that the target program is plagiarized if the calculated discontinuity value is less than a predetermined reference value.
摘要:
The present invention relates to a power factor correction circuit and a method of driving the power factor correction circuit. The power factor correction circuit according to the present invention includes a power transfer element configured to receive an input voltage, an input current corresponding to the input voltage flowing through the power transfer element, and a switch connected to the power transfer element and configured to control an output voltage generated by the current flowing through the power transfer element. The power factor correction circuit is configured to detect a zero voltage edge timing of the input voltage by detecting the input voltage, generate a reference clock signal having a frequency that varies according to the detected edge timing, generate a reference signal using the reference clock signal, generate an error amplification signal based on a difference between the output voltage and a predetermined error reference signal, generate the amplification reference signal by multiplying the reference signal by the error amplification signal, and control a switching operation of the switch using the amplification reference signal and a detection signal corresponding to a current flowing through the switch.
摘要:
The present invention relates a pulse width filter generating a modulation signal that is increased in synchronization with one of an increasing edge and a decreasing edge of the input signal and is decreased in synchronization with the other of the increasing edge and the decreasing edge, and transmitting the input signal of the modulation signal. The input signal passed through the filter unit is inverted thereby being an output signal. The pulse width filter controls the increasing and the decreasing of the modulation signal according to the output signal and the input signal passed through the filter unit, and the modulation signal is a signal to determined whether the pulse width of the input signal is more than the predetermined cut-off pulse width.
摘要:
The present invention relates to an oscillator that is capable of realizing duty balancing.The oscillator determines a switching frequency of a converter converting an input voltage according to a switching operation of switches to generate an output voltage.The oscillator determines a first half cycle of a duty signal determining the switching frequency by using a reference current according to a feedback signal corresponding to the output voltage. The oscillator senses a first half cycle period by using an output of the frequency setting unit, and determines the same period as the first half cycle as a second half cycle of the duty signal after the first half cycle.
摘要:
A high voltage drive circuit includes an edge detector for generating an edge detection signal by detecting edges of a first high side input signal and a first low side input signal, the edge detector providing a high side delay signal and a low side delay signal by delaying the first high side input signal and the first low side input signal, a dead time generator for generating a dead time signal indicating a preset dead time in response to the edge detection signal, and a driver comprising a drive signal generator for providing a high side output signal and a low side output signal by inserting the preset dead time based on the dead time signal into the high side delay signal and the low side delay signal.
摘要:
The present invention relates to a power factor correction circuit and a method of driving the power factor correction circuit. The power factor correction circuit according to the present invention includes a power transfer element configured to receive an input voltage, an input current corresponding to the input voltage flowing through the power transfer element, and a switch connected to the power transfer element and configured to control an output voltage generated by the current flowing through the power transfer element. The power factor correction circuit is configured to detect a zero voltage edge timing of the input voltage by detecting the input voltage, generate a reference clock signal having a frequency that varies according to the detected edge timing, generate a reference signal using the reference clock signal, generate an error amplification signal based on a difference between the output voltage and a predetermined error reference signal, generate the amplification reference signal by multiplying the reference signal by the error amplification signal, and control a switching operation of the switch using the amplification reference signal and a detection signal corresponding to a current flowing through the switch.
摘要:
The present invention relates to a switching operation control device of a power switch, an LED light emitting device including the same, and a control method thereof. The control device detects a zero crossing time when a voltage at an input end of the power switch becomes a zero voltage, generates a reference signal that is synchronized with the voltage at the input end of the power switch by using the detected zero crossing time, and compensates the generated reference signal with a first voltage that is greater than the zero voltage during a blocking period corresponding to the zero crossing time.
摘要:
The switch control device controls a switching operation of a power switch. The switch control device includes an auxiliary power device. The auxiliary power device includes a parasitic capacitor, and charges the parasitic capacitor by receiving a power voltage to generate an auxiliary power voltage. The switch control device includes a control pulse generator driven by the auxiliary power voltage and generating a set pulse and a reset pulse according to an input signal that is input for controlling the switching operation of the power switch. The switch control device generates a gate signal that turns on the power switch by being synchronized with the set pulse and generates a gate signal that turns off the power switch by being synchronized with the reset pulse.
摘要:
The present invention relates to a switching operation control device of a power switch, an LED light emitting device including the same, and a control method thereof. The control device detects a zero crossing time when a voltage at an input end of the power switch becomes a zero voltage, generates a reference signal that is synchronized with the voltage at the input end of the power switch by using the detected zero crossing time, and compensates the generated reference signal with a first voltage that is greater than the zero voltage during a blocking period corresponding to the zero crossing time.