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公开(公告)号：US08436652B2
公开(公告)日：2013-05-07
申请号：US13152008
申请日：2011-06-02
申请人： Sylvain Engels
发明人： Sylvain Engels
IPC分类号： H03K19/173
CPC分类号： H03K3/037
摘要： Sequential electronic circuit (10) reacting on a rising edge and a falling edge of a clock signal (CK), comprising a first (1) and a second (2) D-type flip-flop, a main multiplexer (3) coupled at input to the flip-flops (1 and 2), the circuit (10) comprising a first input receiving the clock signal (CK) and a second input receiving a control signal (TE) so as to control the circuit (10) according to a normal operating mode and a test operating mode making it possible to check the proper operation of the sequential electronic circuit (10). The clock signal (CK) used in the normal operating mode is used to gate the circuit (10) during the test operating mode.
摘要翻译： 顺序电子电路（10）在包括第一（1）和第二（2）D型触发器的时钟信号（CK）的上升沿和下降沿上反应，主复用器（3） 输入到触发器（1和2），电路（10）包括接收时钟信号（CK）的第一输入端和接收控制信号（TE）的第二输入端，以便根据 正常操作模式和测试操作模式，使得可以检查顺序电子电路（10）的正常操作。 在正常操作模式下使用的时钟信号（CK）用于在测试操作模式期间门电路（10）。
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公开(公告)号：US20120062313A1
公开(公告)日：2012-03-15
申请号：US13232529
申请日：2011-09-14
IPC分类号： G05F3/02
CPC分类号： G05F3/205 , H03K19/0013
摘要： A dynamic biasing circuit of the substrate of a MOS power transistor may include a first switch configured to connect the substrate to a current source which forward biases the intrinsic source-substrate diode of the transistor, when the gate voltage of the transistor turns the transistor on. The current source may include a stack of diodes in the same conduction direction as the intrinsic diode between the substrate and a supply voltage.
摘要翻译： MOS功率晶体管的衬底的动态偏置电路可以包括第一开关，其被配置为当晶体管的栅极电压使晶体管导通时，将衬底连接到电流源，该电流源向前偏置晶体管的本征源极 - 衬底二极管 。 电流源可以包括与衬底和电源电压之间的本征二极管相同的导通方向的二极管堆叠。
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3.发明申请METHOD AND DEVICE FOR DRIVING THE FREQUENCY OF A CLOCK SIGNAL OF AN INTEGRATED CIRCUIT 有权用于驱动集成电路的时钟信号频率的方法和装置公开(公告)号：US20110199149A1
公开(公告)日：2011-08-18
申请号：US12986428
申请日：2011-01-07
申请人： Robin Wilson , Sylvain Engels , Eric Balossier
发明人： Robin Wilson , Sylvain Engels , Eric Balossier
IPC分类号： H03K3/011
CPC分类号： G06F1/08 , H01L2924/0002 , H01L2924/00
摘要： An electronic device may include a controlled generator configured to generate an adjustable frequency clock signal at at least one part of an integrated circuit coupled to the output of the controller generator and including at least one transistor having a gate of less than forty-five nanometers in length. The electronic device may include determination circuitry configured to determine the temperature of the at least one part of the integrated circuit, and drive circuitry coupled to the determination circuitry and configured to control the generator to increase the frequency of the clock signal when the temperature increases.
摘要翻译： 电子设备可以包括受控发电机，其被配置为在耦合到控制器发生器的输出的集成电路的至少一部分上产生可调节频率时钟信号，并且包括至少一个具有小于四十五纳米的栅极的晶体管 长度。 电子设备可以包括确定电路，其被配置为确定集成电路的至少一部分的温度，以及耦合到确定电路并被配置为当温度升高时控制发电机来增加时钟信号的频率的驱动电路。
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公开(公告)号：US20130300458A1
公开(公告)日：2013-11-14
申请号：US13616276
申请日：2012-09-14
申请人： Thomas le Huche , Sylvain Engels
发明人： Thomas le Huche , Sylvain Engels
摘要： A circuit for detecting a time skew, including: at least two comparators; a first set of paths respectively connecting a first source of a first signal to said comparators; and a second set of paths respectively connecting a second source of a second signal to said comparators, each comparator detecting a possible skew between said first and second signals.
摘要翻译： 一种用于检测时间偏差的电路，包括：至少两个比较器; 分别将第一信号的第一源连接到所述比较器的第一组路径; 以及分别将第二信号的第二源连接到所述比较器的第二组路径，每个比较器检测所述第一和第二信号之间的可能的偏斜。
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公开(公告)号：US08570096B2
公开(公告)日：2013-10-29
申请号：US13232529
申请日：2011-09-14
IPC分类号： G05F1/10
CPC分类号： G05F3/205 , H03K19/0013
摘要： A dynamic biasing circuit of the substrate of a MOS power transistor may include a first switch configured to connect the substrate to a current source which forward biases the intrinsic source-substrate diode of the transistor, when the gate voltage of the transistor turns the transistor on. The current source may include a stack of diodes in the same conduction direction as the intrinsic diode between the substrate and a supply voltage.
摘要翻译： MOS功率晶体管的衬底的动态偏置电路可以包括第一开关，其被配置为当晶体管的栅极电压使晶体管导通时，将衬底连接到电流源，该电流源向前偏置晶体管的本征源极 - 衬底二极管 。 电流源可以包括与衬底和电源电压之间的本征二极管相同的导通方向的二极管堆叠。
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公开(公告)号：US08710917B2
公开(公告)日：2014-04-29
申请号：US13588811
申请日：2012-08-17
CPC分类号： H03K19/0016
摘要： A method for controlling the power supply of an integrated circuit, the power supply comprising a power supply unit powered by a main voltage and possessing several transistor groups, comprising turning on in succession at least two transistor groups in order to deliver, as an output from each group, to at least one part of the integrated circuit, an elementary supply voltage derived from the main voltage, characterized in that the method comprises at least one elementary power phase for supplying power to said at least one part of the integrated circuit, wherein the phase comprises defining voltage thresholds respectively associated with the transistor groups, turning on a first transistor group, the first group delivering a first elementary supply voltage and turning on at least one second group when the first elementary supply voltage is higher than or equal to the voltage threshold associated with the second group.
摘要翻译： 一种用于控制集成电路的电源的方法，所述电源包括由主电压供电并具有多个晶体管组的电源单元，包括连续接通至少两个晶体管组，以便传送作为 每个组至少部分集成电路是从主电压导出的基本电源电压，其特征在于该方法包括用于向集成电路的所述至少一部分供电的至少一个基本功率相，其中， 所述相位包括定义分别与所述晶体管组相关联的电压阈值，接通第一晶体管组，所述第一组传送第一基本电源电压并且当所述第一基本电源电压高于或等于所述第一基本电源电压时接通至少一个第二组 与第二组相关联的电压阈值。
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7.发明授权Method and device for driving the frequency of a clock signal of an integrated circuit 有权用于驱动集成电路的时钟信号频率的方法和装置公开(公告)号：US08294508B2
公开(公告)日：2012-10-23
申请号：US12986428
申请日：2011-01-07
申请人： Robin Wilson , Sylvain Engels , Eric Balossier
发明人： Robin Wilson , Sylvain Engels , Eric Balossier
IPC分类号： H01L35/00
CPC分类号： G06F1/08 , H01L2924/0002 , H01L2924/00
摘要： An electronic device may include a controlled generator configured to generate an adjustable frequency clock signal at at least one part of an integrated circuit coupled to the output of the controller generator and including at least one transistor having a gate of less than forty-five nanometers in length. The electronic device may include determination circuitry configured to determine the temperature of the at least one part of the integrated circuit, and drive circuitry coupled to the determination circuitry and configured to control the generator to increase the frequency of the clock signal when the temperature increases.
摘要翻译： 电子设备可以包括受控发电机，其被配置为在耦合到控制器发生器的输出的集成电路的至少一部分上产生可调节频率时钟信号，并且包括至少一个具有小于四十五纳米的栅极的晶体管 长度。 电子设备可以包括确定电路，其被配置为确定集成电路的至少一部分的温度，以及耦合到确定电路并被配置为当温度升高时控制发电机来增加时钟信号的频率的驱动电路。
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公开(公告)号：US20110298491A1
公开(公告)日：2011-12-08
申请号：US13152008
申请日：2011-06-02
申请人： Sylvain Engels
发明人： Sylvain Engels
IPC分类号： H03K19/003
CPC分类号： H03K3/037
摘要： Sequential electronic circuit (10) reacting on a rising edge and a falling edge of a clock signal (CK), comprising a first (1) and a second (2) D-type flip-flop, a main multiplexer (3) coupled at input to the flip-flops (1 and 2), the circuit (10) comprising a first input receiving the clock signal (CK) and a second input receiving a control signal (TE) so as to control the circuit (10) according to a normal operating mode and a test operating mode making it possible to check the proper operation of the sequential electronic circuit (10). The clock signal (CK) used in the normal operating mode is used to gate the circuit (10) during the test operating mode.
摘要翻译： 顺序电子电路（10）在包括第一（1）和第二（2）D型触发器的时钟信号（CK）的上升沿和下降沿上反应，主复用器（3） 输入到触发器（1和2），电路（10）包括接收时钟信号（CK）的第一输入端和接收控制信号（TE）的第二输入端，以便根据 正常操作模式和测试操作模式，使得可以检查顺序电子电路（10）的正常操作。 在正常操作模式下使用的时钟信号（CK）用于在测试操作模式期间门电路（10）。
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