INTERCONNECTION FOR CONNECTING A SWITCHED MODE INVERTER TO A LOAD

    公开(公告)号:US20200051712A1

    公开(公告)日:2020-02-13

    申请号:US16658960

    申请日:2019-10-21

    发明人: Robert RICHARDSON

    IPC分类号: H01B9/02 H02M1/44

    摘要: An interconnection for connecting a switched mode inverter to a load, the interconnection comprising: a plurality of insulated conductors; sleeving means sleeving the insulated conductors together; and at least one lossy toroidal inductor core concentric with and partially surrounding the sleeving means to hold the plurality of insulated conductors together; wherein the at least one lossy toroidal inductor core is arranged to act as a common mode inductor to minimise current flowing through the interconnection to a stray capacitance of the load. Preferably, high frequency eddy current effects are minimised in the interconnection by a suitable choice of diameters of conductive cores of the plurality of insulated conductors and the spacing between the centres of the conductive cores.

    Modulator system
    2.
    发明授权

    公开(公告)号:US10755886B2

    公开(公告)日:2020-08-25

    申请号:US16691010

    申请日:2019-11-21

    发明人: Robert Richardson

    IPC分类号: H01J25/50 H05B6/68 H03B9/10

    摘要: The present invention relates to a modulator system adapted to generate high voltage pulses suitable for supply across a high voltage load having a thermionic cathode, such as a magnetron. The modulator system comprises a high voltage DC PSU connected to a switching mechanism adapted to generate high voltage pulses from the high voltage DC PSU for application to a thermionic cathode of a high voltage load. The modulator system further comprises an isolation transformer; a heater PSU adapted to be connected to a cathode heater through the isolation transformer and to provide an AC current thereto. The modulator system further comprises a controller to receive pulse instruction signals and trigger generation of corresponding high voltage pulses by the switching mechanism, to calculate the estimated arrival time of a next pulse instruction signal, based on the time between previous pulse instruction signals, and disable the heater PSU for a preset time, commencing before the estimated arrival time of the next pulse instruction signal, such that no current is supplied from the heater PSU while current is supplied from the high voltage PSU.

    MAGNETRONS
    3.
    发明申请
    MAGNETRONS 审中-公开

    公开(公告)号:US20200251300A1

    公开(公告)日:2020-08-06

    申请号:US16777542

    申请日:2020-01-30

    发明人: David Rowlands

    摘要: A magnetron includes a cathode and a cathode supply lead structure connected to the cathode. A connector is included for electrically connecting to the lead structure and adapted for connection to an external power supply. An electrically conductive casing surrounds the connector. Electrically insulating material is included within the casing and surrounds the connector. The insulating material may be potting material.

    Combining arrangement
    4.
    发明授权

    公开(公告)号:US10164316B2

    公开(公告)日:2018-12-25

    申请号:US15082201

    申请日:2016-03-28

    摘要: A combining arrangement comprises a power combiner having at least four ports. A first match-dependent oscillator is connected to input power at a first frequency to a first input port of the power combiner. A second match-dependent oscillator is connected to input power at a second frequency to a second input port of the power combiner. A mismatch is connected to a third port of the power combiner. The power combiner is operative to combine power from the first and second oscillators and, when the first and second frequencies are different, to apply a fraction of the combined power to the mismatch. The mismatch reflects at least some of the fraction of the combined power to the first and second oscillators to phase and frequency lock their outputs. A fourth output port of the power combiner is connected to receive the combined power. The power combiner attenuation is variable to adjust the proportion of the combined power split between the third port and fourth output port from 0% to 100% of the total combined power for any power values at the first input port and second input port.

    IMAGE SENSOR
    5.
    发明申请
    IMAGE SENSOR 审中-公开

    公开(公告)号:US20190230305A1

    公开(公告)日:2019-07-25

    申请号:US16093568

    申请日:2017-04-13

    摘要: A CCD image sensor of the type for providing charge multiplication by impact ionisation has an image area and a plurality of pixels. A separate multiplication register has a plurality of multiplication elements arranged to receive charge from the pixels of the image area. Each multiplication element comprises a sequence of electrodes operable to cause multiplication, the electrodes of each multiplication element being adjacent one another and non-overlapping. The non-overlapping arrangement may be manufactured by a CMOS process thereby providing a CCD image sensor with the advantages of CCD multiplication but using a CMOS manufacturing process.

    MODULATOR SYSTEM
    6.
    发明申请
    MODULATOR SYSTEM 审中-公开

    公开(公告)号:US20190318899A1

    公开(公告)日:2019-10-17

    申请号:US16164219

    申请日:2018-10-18

    发明人: Robert RICHARDSON

    IPC分类号: H01J25/50 H05B6/68 H03B9/10

    摘要: The present invention relates to a modulator system adapted to generate high voltage pulses suitable for supply across a high voltage load having a thermionic cathode, such as a magnetron. The modulator system comprises a high voltage DC PSU connected to a switching mechanism adapted to generate high voltage pulses from the high voltage DC PSU for application to a thermionic cathode of a high voltage load. The modulator system further comprises an isolation transformer; a heater PSU adapted to be connected to a cathode heater through the isolation transformer and to provide an AC current thereto. The modulator system further comprises a controller to receive pulse instruction signals and trigger generation of corresponding high voltage pulses by the switching mechanism, to calculate the estimated arrival time of a next pulse instruction signal, based on the time between previous pulse instruction signals, and disable the heater PSU for a preset time, commencing before the estimated arrival time of the next pulse instruction signal, such that no current is supplied from the heater PSU while current is supplied from the high voltage PSU.

    CMOS image sensor with backside biased substrate

    公开(公告)号:US10325955B2

    公开(公告)日:2019-06-18

    申请号:US14645728

    申请日:2015-03-12

    IPC分类号: H01L27/146

    摘要: A CMOS image sensor 101 comprises an active layer 11 of a first conductivity type arranged to be reversed biased and a pixel 20 comprising a photosensitive element comprising a well 22 of a second conductivity type and a well 21 of the first conductivity type containing active CMOS elements for reading and resetting the photosensitive element. The CMOS image sensor further comprises a doped buried layer 111 of the second conductivity type in the active layer beneath the well of the first conductivity type. The buried layer is arranged to extend a depletion region below the well of the second conductivity type also below the well of the first conductivity type.