公开(公告)号：US07561095B2

公开(公告)日：2009-07-14

申请号：US11889698

申请日：2007-08-15

申请人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

发明人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

IPC分类号： H03M1/38

CPC分类号： H03M1/002 ,  H03M1/0695 ,  H03M1/1215 ,  H03M1/167

摘要： A semiconductor integrated circuit device provided with a pipeline A-D conversion circuit in which the enhancement of accuracy and the reduction of power consumption are accomplished is provided. The pipeline A-D conversion circuit is connected in series with an input terminal to which an analog signal to be converted is inputted and has a plurality of stages. The stages other than the first stage connected with the input terminal through at least one stage, including the first stage that receives input signals from the input terminal are constructed as follows: each of the other stages is comprised of two or more sample and hold circuits and an amplifier connected in common with the two or more sample and hold circuits. The two or more sample and hold circuits are caused to perform interleave operation.

摘要翻译： 提供了一种具有提高精度和降低功耗的管线A-D转换电路的半导体集成电路器件。 流水线A-D转换电路与要输入的模拟信号的输入端串联连接，具有多级。 除了通过至少一个级与输入端连接的第一级之外的级，包括从输入端接收输入信号的第一级被构造如下：其他级中的每一级包括两个或更多个采样和保持电路 以及与两个或更多个采样和保持电路共同连接的放大器。 使两个以上的采样和保持电路进行交织操作。

公开(公告)号：US07208983B2

公开(公告)日：2007-04-24

申请号：US10855608

申请日：2004-05-28

申请人： Eiki Imaizumi ,  Takanobu Anbo ,  Yasuhiko Sone ,  Tatsuji Matsuura ,  Teruaki Odaka

发明人： Eiki Imaizumi ,  Takanobu Anbo ,  Yasuhiko Sone ,  Tatsuji Matsuura ,  Teruaki Odaka

IPC分类号： G11C27/02

CPC分类号： H04N5/335

摘要： By flexibly coping with both image sensors of a CCD sensor and a CMOS sensor without providing any external circuit, a signal processing is performed. In a sensor selecting switch provided in an image-sensor signal-processing circuit, first and fourth switches are turned on when the CMOS sensor is connected, and second and third switches are turned on when the CCD sensor is connected. The sensor selecting switch is controlled by a control signal generated in a control circuit, based on sensor selection data which is stored in a register and which is data for selecting the CCD or CMOS sensor. By so doing, even if polarity of an output signal of the image sensor is reversed, a normal signal is inputted to both inputs of the CDS amplifier, whereby it is possible to flexibly cope with both of the CCD and CMOS sensors.

摘要翻译： 通过灵活应对CCD传感器的图像传感器和CMOS传感器，而不提供任何外部电路，执行信号处理。 在设置在图像传感器信号处理电路中的传感器选择开关中，当连接CMOS传感器时，第一和第四开关导通，并且当连接CCD传感器时第二和第三开关接通。 传感器选择开关由控制电路中产生的控制信号基于存储在寄存器中的传感器选择数据控制，并且是用于选择CCD或CMOS传感器的数据。 通过这样做，即使图像传感器的输出信号的极性反转，正常信号也被输入到CDS放大器的两个输入端，由此可以灵活地处理CCD和CMOS传感器。

公开(公告)号：US20080174465A1

公开(公告)日：2008-07-24

申请号：US11889698

申请日：2007-08-15

申请人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

发明人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

IPC分类号： H03M1/38

CPC分类号： H03M1/002 ,  H03M1/0695 ,  H03M1/1215 ,  H03M1/167

摘要： A semiconductor integrated circuit device provided with a pipeline A-D conversion circuit in which the enhancement of accuracy and the reduction of power consumption are accomplished is provided. The pipeline A-D conversion circuit is connected in series with an input terminal to which an analog signal to be converted is inputted and has a plurality of stages. The stages other than the first stage connected with the input terminal through at least one stage, including the first stage that receives input signals from the input terminal are constructed as follows: each of the other stages is comprised of two or more sample and hold circuits and an amplifier connected in common with the two or more sample and hold circuits. The two or more sample and hold circuits are caused to perform interleave operation.

摘要翻译： 提供了一种具有提高精度和降低功耗的管线A-D转换电路的半导体集成电路器件。 流水线A-D转换电路与要输入的模拟信号的输入端串联连接，具有多级。 除了通过至少一个级与输入端连接的第一级之外的级，包括从输入端接收输入信号的第一级被构造如下：其他级中的每一级包括两个或更多个采样和保持电路 以及与两个或更多个采样和保持电路共同连接的放大器。 使两个以上的采样和保持电路进行交织操作。

公开(公告)号：US07265703B2

公开(公告)日：2007-09-04

申请号：US11197586

申请日：2005-08-05

申请人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

发明人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

IPC分类号： H03M1/38

CPC分类号： H03M1/002 ,  H03M1/0695 ,  H03M1/1215 ,  H03M1/167

摘要： A semiconductor integrated circuit device provided with a pipeline A-D conversion circuit in which the enhancement of accuracy and the reduction of power consumption are accomplished is provided. The pipeline A-D conversion circuit is connected in series with an input terminal to which an analog signal to be converted is inputted and has a plurality of stages. The stages other than the first stage connected with the input terminal through at least one stage, including the first stage that receives input signals from the input terminal are constructed as follows: each of the other stages is comprised of two or more sample and hold circuits and an amplifier connected in common with the two or more sample and hold circuits. The two or more sample and hold circuits are caused to perform interleave operation.

摘要翻译： 提供了一种具有提高精度和降低功耗的管线A-D转换电路的半导体集成电路器件。 流水线A-D转换电路与要输入的模拟信号的输入端串联连接，具有多级。 除了通过至少一个级与输入端连接的第一级之外的级，包括从输入端接收输入信号的第一级被构造如下：其他级中的每一级包括两个或更多个采样和保持电路 以及与两个或更多个采样和保持电路共同连接的放大器。 使两个以上的采样和保持电路进行交织操作。

公开(公告)号：US20060044172A1

公开(公告)日：2006-03-02

申请号：US11197586

申请日：2005-08-05

申请人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

发明人： Fumiyasu Sasaki ,  Eiki Imaizumi ,  Takanobu Anbo

IPC分类号： H03M1/38

CPC分类号： H03M1/002 ,  H03M1/0695 ,  H03M1/1215 ,  H03M1/167

摘要： A semiconductor integrated circuit device provided with a pipeline A-D conversion circuit in which the enhancement of accuracy and the reduction of power consumption are accomplished is provided. The pipeline A-D conversion circuit is connected in series with an input terminal to which an analog signal to be converted is inputted and has a plurality of stages. The stages other than the first stage connected with the input terminal through at least one stage, including the first stage that receives input signals from the input terminal are constructed as follows: each of the other stages is comprised of two or more sample and hold circuits and an amplifier connected in common with the two or more sample and hold circuits. The two or more sample and hold circuits are caused to perform interleave operation.

摘要翻译： 提供了一种具有提高精度和降低功耗的管线A-D转换电路的半导体集成电路器件。 流水线A-D转换电路与要输入的模拟信号的输入端子串联连接，具有多级。 除了通过至少一个级与输入端连接的第一级之外的级，包括从输入端接收输入信号的第一级被构造如下：其他级中的每一级包括两个或更多个采样和保持电路 以及与两个或更多个采样和保持电路共同连接的放大器。 使两个以上的采样和保持电路进行交织操作。

公开(公告)号：US5394148A

公开(公告)日：1995-02-28

申请号：US026038

申请日：1993-03-04

申请人： Tatsuji Matsuura ,  Imaizumi Eiki ,  Kunihiko Usui ,  Takanobu Anbo

发明人： Tatsuji Matsuura ,  Imaizumi Eiki ,  Kunihiko Usui ,  Takanobu Anbo

IPC分类号： H03M1/10 ,  H03M1/14 ,  H03M1/36 ,  H03M1/42

CPC分类号： H03M1/146 ,  H03M1/365

摘要： A high speed, accurate AD converter operable at low supply voltage, even with low gain amplifiers, particularly for a serial-parallel or pipelined AD converter, has a sub AD converter in each block of the second and subsequent stages provided with an adjuster for adjusting the full scale reference voltage in accordance with the gain of the error amplifier of the preceding stage. Analog switches are rendered immune to low operating voltage by being supplied separate voltage higher than the supply voltage of the other components in their circuit.

摘要翻译： 即使使用低增益放大器，特别是串并联或流水线式AD转换器，也可以在低电源电压下工作的高速，精确的AD转换器在第二级和后续级的每个模块中都有一个副AD转换器，它设有调节器 根据前级误差放大器的增益，满量程参考电压。 模拟开关通过提供高于其电路中其他组件的电源电压的单独电压而免于低工作电压。

公开(公告)号：US20070159540A1

公开(公告)日：2007-07-12

申请号：US11717625

申请日：2007-03-14

申请人： Eiki Imaizumi ,  Takanobu Anbo ,  Yasuhiko Sone ,  Tatsuji Matsuura ,  Teruaki Odaka

发明人： Eiki Imaizumi ,  Takanobu Anbo ,  Yasuhiko Sone ,  Tatsuji Matsuura ,  Teruaki Odaka

IPC分类号： H04N5/20

CPC分类号： H04N5/335

摘要： By flexibly coping with both image sensors of a CCD sensor and a CMOS sensor without providing any external circuit, a signal processing is performed. In a sensor selecting switch provided in an image-sensor signal-processing circuit, first and fourth switches are turned on when the CMOS sensor is connected, and second and third switches are turned on when the CCD sensor is connected. The sensor selecting switch is controlled by a control signal generated in a control circuit, based on sensor selection data which is stored in a register and which is data for selecting the CCD or CMOS sensor. By so doing, even if polarity of an output signal of the image sensor is reversed, a normal signal is inputted to both inputs of the CDS amplifier, whereby it is possible to flexibly cope with both of the CCD and CMOS sensors.

摘要翻译： 通过灵活应对CCD传感器的图像传感器和CMOS传感器而不提供任何外部电路，执行信号处理。 在设置在图像传感器信号处理电路中的传感器选择开关中，当连接CMOS传感器时，第一和第四开关导通，并且当连接CCD传感器时第二和第三开关接通。 传感器选择开关由控制电路中产生的控制信号基于存储在寄存器中的传感器选择数据控制，并且是用于选择CCD或CMOS传感器的数据。 通过这样做，即使图像传感器的输出信号的极性反转，正常信号也被输入到CDS放大器的两个输入端，由此可以灵活地处理CCD和CMOS传感器。