公开(公告)号：US08952454B2

公开(公告)日：2015-02-10

申请号：US13673263

申请日：2012-11-09

申请人： Kazuhiro Shimizu ,  Junichi Yamashita ,  Takuichiro Shitomi

发明人： Kazuhiro Shimizu ,  Junichi Yamashita ,  Takuichiro Shitomi

IPC分类号： H01L27/12 ,  H01L23/544 ,  H01L21/762

CPC分类号： G03F9/708 ,  B81C1/00603 ,  G03F9/7084 ,  H01L21/308 ,  H01L21/76256 ,  H01L21/764 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： An SOI wafer according to the present invention includes a support substrate and an insulating layer formed on the support substrate, a predetermined cavity pattern being formed on one of main surfaces of the support substrate on which the insulating layer is provided, further includes an active semiconductor layer formed on the insulating layer with the cavity pattern being closed, the active semiconductor layer not being formed in an outer peripheral portion of the support substrate, and further includes a plurality of superposition mark patterns formed in the outer peripheral portion on the one of the main surfaces of the support substrate for specifying a position of the cavity pattern.

摘要翻译： 根据本发明的SOI晶片包括支撑基板和形成在支撑基板上的绝缘层，在其上设置绝缘层的支撑基板的一个主表面上形成预定的空腔图案，还包括有源半导体 所述绝缘层上形成有所述空腔图案的绝缘层，所述有源半导体层不形成在所述支撑基板的外周部，并且还包括形成在所述支撑基板的所述一个的外周部的多个叠加标记图案 用于指定空腔图案的位置的支撑基板的主表面。

公开(公告)号：US20130221439A1

公开(公告)日：2013-08-29

申请号：US13673263

申请日：2012-11-09

申请人： Kazuhiro SHIMIZU ,  Junichi YAMASHITA ,  Takuichiro SHITOMI

发明人： Kazuhiro SHIMIZU ,  Junichi YAMASHITA ,  Takuichiro SHITOMI

IPC分类号： H01L29/02 ,  H01L21/20

CPC分类号： G03F9/708 ,  B81C1/00603 ,  G03F9/7084 ,  H01L21/308 ,  H01L21/76256 ,  H01L21/764 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： An SOI wafer according to the present invention includes a support substrate and an insulating layer formed on the support substrate, a predetermined cavity pattern being formed on one of main surfaces of the support substrate on which the insulating layer is provided, further includes an active semiconductor layer formed on the insulating layer with the cavity pattern being closed, the active semiconductor layer not being formed in an outer peripheral portion of the support substrate, and further includes a plurality of superposition mark patterns formed in the outer peripheral portion on the one of the main surfaces of the support substrate for specifying a position of the cavity pattern.

摘要翻译： 根据本发明的SOI晶片包括支撑基板和形成在支撑基板上的绝缘层，在其上设置绝缘层的支撑基板的一个主表面上形成预定的空腔图案，还包括有源半导体 所述绝缘层上形成有所述空腔图案的绝缘层，所述有源半导体层不形成在所述支撑基板的外周部，并且还包括形成在所述支撑基板的所述一个的外周部的多个叠加标记图案 用于指定空腔图案的位置的支撑基板的主表面。