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    Amplifier circuit
    2.
    发明授权
    Amplifier circuit 有权
    放大器电路

    公开(公告)号：US08416021B2

    公开(公告)日：2013-04-09

    申请号：US13221310

    申请日：2011-08-30

    申请人： Tatsuya Takei

    发明人： Tatsuya Takei

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45197 ,  H03F3/45201 ,  H03F2203/45082 ,  H03F2203/45352

    摘要： An amplifier circuit may include an input differential pair that includes a first transistor and a second transistor, a positive input voltage being supplied to a gate terminal of the first transistor, a negative input voltage being supplied to a gate terminal of the second transistor, a first resistor that generates a differential current corresponding to a differential voltage between the positive input voltage and the negative input voltage, an output differential pair that includes a third transistor and a fourth transistor, a negative output voltage being supplied from a drain terminal of the third terminal, a positive output voltage being supplied from a drain terminal of the fourth terminal, a second resistor that is connected to a reference voltage, the differential current generated by the first resistor being supplied to the second resistor, and a bias circuit that supplies a constant bias current to the first, second, third, and fourth transistors.

    摘要翻译： 放大器电路可以包括输入差分对，其包括第一晶体管和第二晶体管，正输入电压被提供给第一晶体管的栅极端，负输入电压被提供给第二晶体管的栅极端， 第一电阻器，其产生对应于正输入电压和负输入电压之间的差分电压的差分电流;包括第三晶体管和第四晶体管的输出差分对，从第三晶体管的漏极端子提供的负输出电压 端子，从第四端子的漏极端子提供的正输出电压，连接到参考电压的第二电阻器，由第一电阻器产生的差分电流被提供给第二电阻器;以及偏置电路， 到第一，第二，第三和第四晶体管的恒定偏置电流。

    OPERATIONAL AMPLIFIER CIRCUIT
    3.
    发明申请
    OPERATIONAL AMPLIFIER CIRCUIT 有权
    操作放大器电路

    公开(公告)号：US20120182071A1

    公开(公告)日：2012-07-19

    申请号：US13349861

    申请日：2012-01-13

    申请人： Tatsuya Takei

    发明人： Tatsuya Takei

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45475 ,  H03F3/45192 ,  H03F3/4565 ,  H03F3/45937 ,  H03F2203/45082 ,  H03F2203/45406 ,  H03F2203/45444 ,  H03F2203/45482

    摘要： An operational amplifier circuit may include a fully differential amplifier circuit that has a common mode feedback, the fully differential amplifier circuit performing operational amplification using a common mode base voltage as a center, a common mode detection circuit that detects a common mode output voltage of the fully differential amplifier circuit, a sample and hold circuit that performs sample and hold of an output of the common mode detection circuit, an operational circuit that detects a deviation between the output of the sample and hold circuit and a common mode reference voltage, the operational circuit outputting a voltage corresponding to the detected deviation and the common mode reference voltage, and a switching circuit that selects the common mode reference voltage or an output of the operational circuit to output the common mode reference voltage or the output as the common mode base voltage.

    摘要翻译： 运算放大器电路可以包括具有共模反馈的全差分放大器电路，全差分放大器电路使用共模基极电压作为中心进行运算放大，共模检测电路检测共模输出电压 全差分放大器电路，对共模检测电路的输出进行采样和保持的采样和保持电路，检测采样和保持电路的输出与共模参考电压之间的偏差的运算电路， 输出对应于检测到的偏差和共模参考电压的电压的电路，以及选择共模参考电压的开关电路或输出共模参考电压或输出作为共模基极电压的运算电路的输出 。

    SEMICONDUCTOR DEVICE AND SAMPLE-AND-HOLD CIRCUIT
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND SAMPLE-AND-HOLD CIRCUIT 审中-公开
    半导体器件和样品保持电路

    公开(公告)号：US20120092042A1

    公开(公告)日：2012-04-19

    申请号：US13274836

    申请日：2011-10-17

    申请人： Tatsuya Takei

    发明人： Tatsuya Takei

    IPC分类号： G11C27/02 ,  H03K17/687

    CPC分类号： G11C27/024 ,  G11C27/02

    摘要： A semiconductor device includes a MOS transistor switch that controls passage and interruption of a signal by switching between an ON state and an OFF state, a first switch connected between a back gate terminal of the MOS transistor switch and a source terminal of the MOS transistor switch, and a second switch connected between the back gate terminal of the MOS transistor switch and a power supply voltage terminal If the MOS transistor switch is in the ON state, the first switch is in the ON state and the back gate terminal of the MOS transistor switch is connected to the source terminal of the MOS transistor switch. If the MOS transistor switch is in the OFF state, the second switch is in the ON state, and the back gate terminal of the MOS transistor switch is connected to the power supply voltage terminal.

    摘要翻译： 半导体器件包括MOS晶体管开关，其通过在导通状态和断开状态之间切换来控制信号的通过和中断，连接在MOS晶体管开关的背栅极端子与MOS晶体管开关的源极端子之间的第一开关 以及连接在MOS晶体管开关的背栅极端子和电源电压端子之间的第二开关。如果MOS晶体管开关处于导通状态，则第一开关处于导通状态，并且MOS晶体管的背栅极端子 开关连接到MOS晶体管开关的源极端子。 如果MOS晶体管开关处于截止状态，则第二开关处于导通状态，MOS晶体管开关的背栅极端子与电源电压端子连接。

    AMPLIFIER CIRCUIT
    5.
    发明申请
    AMPLIFIER CIRCUIT 有权
    放大器电路

    公开(公告)号：US20120049958A1

    公开(公告)日：2012-03-01

    申请号：US13221310

    申请日：2011-08-30

    申请人： Tatsuya TAKEI

    发明人： Tatsuya TAKEI

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45197 ,  H03F3/45201 ,  H03F2203/45082 ,  H03F2203/45352

    摘要： An amplifier circuit may include an input differential pair that includes a first transistor and a second transistor, a positive input voltage being supplied to a gate terminal of the first transistor, a negative input voltage being supplied to a gate terminal of the second transistor, a first resistor that generates a differential current corresponding to a differential voltage between the positive input voltage and the negative input voltage, an output differential pair that includes a third transistor and a fourth transistor, a negative output voltage being supplied from a drain terminal of the third terminal, a positive output voltage being supplied from a drain terminal of the fourth terminal, a second resistor that is connected to a reference voltage, the differential current generated by the first resistor being supplied to the second resistor, and a bias circuit that supplies a constant bias current to the first, second, third, and fourth transistors.

    摘要翻译： 放大器电路可以包括输入差分对，其包括第一晶体管和第二晶体管，正输入电压被提供给第一晶体管的栅极端，负输入电压被提供给第二晶体管的栅极端， 第一电阻器，其产生对应于正输入电压和负输入电压之间的差分电压的差分电流;包括第三晶体管和第四晶体管的输出差分对，从第三晶体管的漏极端子提供的负输出电压 端子，从第四端子的漏极端子提供的正输出电压，连接到参考电压的第二电阻器，由第一电阻器产生的差分电流被提供给第二电阻器;以及偏置电路， 到第一，第二，第三和第四晶体管的恒定偏置电流。