公开(公告)号：US20060227895A1

公开(公告)日：2006-10-12

申请号：US11442488

申请日：2006-05-26

申请人： Richard Booth ,  Stephan Schell ,  Thomas Biedka ,  Paul Liang

发明人： Richard Booth ,  Stephan Schell ,  Thomas Biedka ,  Paul Liang

IPC分类号： H04L27/00 ,  H04L25/03

CPC分类号： H04L25/03866

摘要： This invention, generally speaking, modifies pulse amplitude modulated signals to reduce the ratio of average power to minimum power. The signal is modified in such a manner that the signal quality remains acceptable. The signal quality is described in terms of the Power Spectral Density (PSD) and the Error Vector Magnitude (EVM).

摘要翻译： 本发明一般地说是修改脉冲幅度调制信号以减小平均功率与最小功率的比值。 信号被修改为使得信号质量保持可接受的方式。 根据功率谱密度（PSD）和误差矢量幅度（EVM）来描述信号质量。

公开(公告)号：US20050281360A1

公开(公告)日：2005-12-22

申请号：US10037870

申请日：2001-10-22

申请人： Richard Booth ,  Stephan Schell ,  Thomas Biedka ,  Paul Liang

发明人： Richard Booth ,  Stephan Schell ,  Thomas Biedka ,  Paul Liang

IPC分类号： H04L27/36 ,  H04L25/03 ,  H04L27/04

CPC分类号： H04L25/03866

摘要： This invention, generally speaking, modifies pulse amplitude modulated signals to reduce the ratio of average power to minimum power. The signal is modified in such a manner that the signal quality remains acceptable. The signal quality is described in terms of the Power Spectral Density (PSD) and the Error Vector Magnitude (EVM).

摘要翻译： 本发明一般地说是修改脉冲幅度调制信号以减小平均功率与最小功率的比值。 信号被修改为使得信号质量保持可接受的方式。 根据功率谱密度（PSD）和误差矢量幅度（EVM）来描述信号质量。

公开(公告)号：US07902891B1

公开(公告)日：2011-03-08

申请号：US12576953

申请日：2009-10-09

申请人： Kenji Miyanaga ,  Akira Kato ,  Paul Cheng-Po Liang ,  Thomas Biedka

发明人： Kenji Miyanaga ,  Akira Kato ,  Paul Cheng-Po Liang ,  Thomas Biedka

IPC分类号： H03L7/06

CPC分类号： H03C3/0941 ,  H03C3/095 ,  H03C3/0966 ,  H03C3/0991

摘要： A two-point modulator using a voltage control oscillator includes: a modulation section including a feedback circuit for performing feedback control of a signal outputted from the voltage control oscillator based on an inputted modulated signal, and a feedforward circuit for calibrating the modulated signal and outputting the calibrated modulated signal to the voltage control oscillator; a signal output section for, upon calibration processing, outputting a predetermined reference signal in place of the modulated signal, to the modulation section; and a gain correction section for, in a state where the feedback circuit is in an open loop state, calculating a frequency transition amount of the reference signal outputted from the voltage control oscillator, and correcting a gain used for calibration of the modulated signal performed by the feedforward circuit, based on the calculated frequency transition amount.

摘要翻译： 使用电压控制振荡器的两点调制器包括：调制部分，包括用于基于输入的调制信号执行从压控振荡器输出的信号的反馈控制的反馈电路，以及用于校准调制信号并输出​​的前馈电路 校准的调制信号到压控振荡器; 信号输出部分，用于在校准处理时，将预定的参考信号代替调制信号输出到调制部分; 以及增益校正部，其在所述反馈电路处于开环状态的状态下，计算从所述电压控制振荡器输出的所述参考信号的频率变化量，以及校正由所述调制信号进行的校准的增益， 前馈电路，基于计算的频率过渡量。

公开(公告)号：US20080055007A1

公开(公告)日：2008-03-06

申请号：US11890597

申请日：2007-08-06

申请人： Thomas Biedka

发明人： Thomas Biedka

IPC分类号： H03L7/00

CPC分类号： H03L7/093 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966 ,  H03C3/0991 ,  H03L2207/06

摘要： The present invention, generally speaking, provides a VCO linearization technique applicable to advanced loop architectures. In particular, the linearization technique is applicable to a mostly-digital frequency locked loop (FLL), phase locked loop (PLL) or the like using multi-point modulation. In an exemplary embodiment, a correction table is used to form a corrected control variable that affects one modulation point only (e.g., a fast modulation path) of the multi-point modulation circuit. The other modulation point (e.g., a slow modulation path) of the multi-point modulation circuit is controlled in accordance with an error-forming circuit including a loop filter. The use of correction within the fast path enables the VCO to achieve more rapid phase changes than would otherwise be possible, an advantage in high-data-rate communications applications, for example.

摘要翻译： 本发明一般地提供一种适用于高级环路架构的VCO线性化技术。 特别地，线性化技术可应用于使用多点调制的大多数数字锁相环（FLL），锁相环（PLL）等。 在示例性实施例中，校正表用于形成影响多点调制电路的一个调制点（例如，快速调制路径）的校正控制变量。 根据包括环路滤波器的误差形成电路来控制多点调制电路的另一调制点（例如，慢调制路径）。 在快速通路中使用校正使得VCO能够实现比否则可能的更快速的相位变化，例如在高数据速率通信应用中的优点。

公开(公告)号：US20060029153A1

公开(公告)日：2006-02-09

申请号：US11244010

申请日：2005-10-04

申请人： Thomas Biedka ,  Wayne Lee ,  Gary Do

发明人： Thomas Biedka ,  Wayne Lee ,  Gary Do

IPC分类号： H04L27/20

CPC分类号： H04L27/361 ,  H03C5/00

摘要： Methods of and apparatus for digitally controlling, with sub-sample resolution, the relative timing of the magnitude and phase paths in a polar modulator. The timing resolution is limited by the dynamic range of the system as opposed to the sample rate. The methods and apparatus of the invention use a digital filter to approximate a sub-sample time delay. Various techniques for approximating a sub-sample time delay using digital signal processing may be used to achieve the approximation. Ideally, the filter will have an all-pass magnitude response and a linear phase response. In practice, the magnitude may be low-pass and the phase may not be perfectly linear. Such deviation from the ideal response will introduce some distortion. However, this distortion may be acceptably small depending on the particular signal being processed.