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1.发明申请MINIMIZING ADVERSE EFFECTS OF SKEW BETWEEN TWO ANALOG-TO-DIGITAL CONVERTERS 有权最小化两个模拟数字转换器之间的毛刺的不利影响公开(公告)号：US20100060496A1
公开(公告)日：2010-03-11
申请号：US12388627
申请日：2009-02-19
IPC分类号： H03M1/06
CPC分类号： H03M1/0624 , H03M1/1205
摘要： Skew between a first clock signal received by a first analog-to-digital converter (ADC) and a second clock signal received by a second ADC is adjusted to minimize error. Each ADC has an ADC element that produces a respective first or second digital output signal in response to an analog input signal and a respective first or second clock signal. A correction signal is produced in response to the first and second digital output signals. The skew between the first and second clock signals is then adjusted in response to the correction signal.
摘要翻译： 调整由第一模数转换器（ADC）接收的第一时钟信号与由第二ADC接收的第二时钟信号之间的偏差，以最小化误差。 每个ADC具有响应于模拟输入信号和相应的第一或第二时钟信号而产生相应的第一或第二数字输出信号的ADC元件。 响应于第一和第二数字输出信号产生校正信号。 然后响应于校正信号来调整第一和第二时钟信号之间的偏移。
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2.发明授权Receiver having decisional feedback equalizer with remodulation and related methods 失效接收机具有重新调制和相关方法的决策反馈均衡器公开(公告)号：US07418061B2
公开(公告)日：2008-08-26
申请号：US11599334
申请日：2006-11-15
申请人： Thomas D. Kwon , Jonathan S. Min , Fang Lu , Thomas J. Kolze
发明人： Thomas D. Kwon , Jonathan S. Min , Fang Lu , Thomas J. Kolze
CPC分类号： H04L25/03273 , H04L25/03057 , H04L27/3827 , H04L2025/0349 , H04L2027/003 , H04L2027/004 , H04L2027/0055 , H04L2027/0061
摘要： A receiver includes a filter stage that receives, filters, and equalizes a received signal, and a decisional feedback loop coupled to the filter stage that receives and processes a signal output from the filter stage using remodulation. The decisional feedback loop includes a converter that generates a baseband signal, a detector that generates a decision signal, a restorative signal generator that generates a restorative signal using remodulation, and a carrier loop that generates a frequency correction signal and provides a frequency-offset estimate. The restorative signal and the frequency correction signal are provided to the converter to compensate for inter-symbol interference. The presented “remodulation” technique decouples interaction between the carrier loop, the pre-filters, and the equalizer of the restorative signal generator, providing an architecture that is more stable and significantly faster than conventional architectures.
摘要翻译： 接收机包括接收，滤波和均衡接收信号的滤波器级，以及耦合到滤波器级的判决反馈回路，其接收并处理从再过滤阶段输出的信号。 判决反馈回路包括产生基带信号的转换器，产生判定信号的检测器，使用再调制产生恢复信号的恢复信号发生器，以及产生频率校正信号并提供频偏估计的载波环路 。 将修复信号和频率校正信号提供给转换器以补偿符号间干扰。 所提出的“再调制”技术解耦了载体环路，预滤波器和恢复信号发生器的均衡器之间的相互作用，提供比传统架构更稳定和显着更快的架构。
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公开(公告)号：US07142618B2
公开(公告)日：2006-11-28
申请号：US10724036
申请日：2003-12-01
申请人： Thomas D Kwon , Jonathan S Min , Fang Lu , Thomas J Kolze
发明人： Thomas D Kwon , Jonathan S Min , Fang Lu , Thomas J Kolze
IPC分类号： H04L1/00
CPC分类号： H04L25/03273 , H04L25/03057 , H04L27/3827 , H04L2025/0349 , H04L2027/003 , H04L2027/004 , H04L2027/0055 , H04L2027/0061
摘要： A receiver includes a filter for filtering a received signal to produce a filtered signal. A converter converts the filtered signal to a baseband signal that is substantially free of an initial frequency offset and inter-symbol interference (ISI), responsive to a frequency-offset estimate and a restorative signal that compensates for the ISI. A detector detects symbols in the baseband signal to produce a decision signal. A restorative signal generator generates, from the decision signal, the restorative signal responsive to the frequency-offset estimate, such that the restorative signal compensates for the ISI.
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公开(公告)号：US06714608B1
公开(公告)日：2004-03-30
申请号：US09013964
申请日：1998-01-27
申请人： Henry Samueli , Alan Y. Kwentus , Thomas D. Kwon
发明人： Henry Samueli , Alan Y. Kwentus , Thomas D. Kwon
IPC分类号： H04L2706
CPC分类号： H04H40/90 , H04L7/033 , H04L27/0014 , H04L2027/0057
摘要： Carrier signals are modulated by information (e.g., television) signals in a particular frequency range. The information signals are oversampled at a first frequency greater than any of the frequencies in the particular frequency range to provide digital signals at a second frequency. The digital signals are introduced to a carrier recovery loop which provides a feedback to regulate the frequency of the digital signals at the second frequency. The digital signals are introduced to a symbol recovery loop which provides a feedback to maintain the time for the production of the digital signals in the middle of the data signals. The gain of the digital signals is also regulated in a feedback loop. The digital signals are processed to recover the data in the data signals. By providing digital feedbacks, the information recovered from the digital signals can be quite precise. In one embodiment, the carrier signals are demodulated to produce baseband inphase and quadrature signals. The inphase and quadrature signals are then oversampled and regulated in the feedback loops as described above. In a second embodiment, the carrier signals downconverted to produce intermediate frequency signals which are oversampled to produce the digital signals at the second frequency without producing the inphase and quadrature signals. The oversampled signals are then regulated in the feedback loops as described above. In a third embodiment, the carrier signals are oversampled without being downconverted and without producing the inphase and quadrature signals.
摘要翻译： 载波信号由特定频率范围内的信息（例如电视）信号调制。 以大于特定频率范围内的任何频率的第一频率对信息信号进行过采样，以提供第二频率的数字信号。 数字信号被引入载波恢复回路，其提供反馈以调节第二频率处的数字信号的频率。 数字信号被引入到符号恢复循环，其提供反馈以保持在数据信号中间产生数字信号的时间。 数字信号的增益也在反馈环路中调节。 处理数字信号以恢复数据信号中的数据。 通过提供数字反馈，从数字信号中恢复的信息可以相当精确。 在一个实施例中，载波信号被解调以产生基带同相和正交信号。 然后如上所述，在反馈回路中对同相和正交信号进行过采样和调节。 在第二实施例中，载波信号被下变频以产生过采样的中频信号，以在第二频率产生数字信号，而不产生同相和正交信号。 如上所述，过采样信号在反馈回路中被调节。 在第三实施例中，载波信号被过采样而不进行下变频，而不产生同相和正交信号。
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公开(公告)号：US06690753B2
公开(公告)日：2004-02-10
申请号：US10163871
申请日：2002-06-07
申请人： Thomas D. Kwon , Jonathan S. Min , Fang Lu , Thomas J. Kolze
发明人： Thomas D. Kwon , Jonathan S. Min , Fang Lu , Thomas J. Kolze
IPC分类号： H04L100
CPC分类号： H04L25/03273 , H04L25/03057 , H04L27/3827 , H04L2025/0349 , H04L2027/003 , H04L2027/004 , H04L2027/0055 , H04L2027/0061
摘要： A receiver includes a filter for filtering a received signal to produce a filtered signal. A converter converts the filtered signal to a baseband signal that is substantially free of an initial frequency offset and inter-symbol interference (ISI), responsive to a frequency-offset estimate and a restorative signal that compensates for the ISI. A detector detects symbols in the baseband signal to produce a decision signal. A restorative signal generator generates, from the decision signal, the restorative signal responsive to the frequency-offset estimate, such that the restorative signal compensates for the ISI.
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6.发明授权公开(公告)号：US07808408B2
公开(公告)日：2010-10-05
申请号：US12388627
申请日：2009-02-19
IPC分类号： H03M1/06
CPC分类号： H03M1/0624 , H03M1/1205
摘要： Skew between a first clock signal received by a first analog-to-digital converter (ADC) and a second clock signal received by a second ADC is adjusted to minimize error. Each ADC has an ADC element that produces a respective first or second digital output signal in response to an analog input signal and a respective first or second clock signal. A correction signal is produced in response to the first and second digital output signals. The skew between the first and second clock signals is then adjusted in response to the correction signal.
摘要翻译： 调整由第一模数转换器（ADC）接收的第一时钟信号与由第二ADC接收的第二时钟信号之间的偏差，以最小化误差。 每个ADC具有响应于模拟输入信号和相应的第一或第二时钟信号而产生相应的第一或第二数字输出信号的ADC元件。 响应于第一和第二数字输出信号产生校正信号。 然后响应于校正信号来调整第一和第二时钟信号之间的偏移。
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公开(公告)号：US07800521B2
公开(公告)日：2010-09-21
申请号：US12341550
申请日：2008-12-22
IPC分类号： H03M1/06
CPC分类号： H03M1/1038 , H03M1/12
摘要： An apparatus for converting an analog signal to a digital signal comprising a first analog to digital converter for generating a first digital value from an analog value. A second analog to digital converter for generating a second digital value from the analog value. Logic for determining a correction factor for the second digital value based on a difference between the first digital value and the second digital value, wherein the logic updates the correction factor.
摘要翻译： 一种用于将模拟信号转换为数字信号的装置，包括用于从模拟值产生第一数字值的第一模数转换器。 第二模数转换器，用于从模拟值产生第二数字值。 用于基于第一数字值和第二数字值之间的差确定第二数字值的校正因子的逻辑，其中逻辑更新校正因子。
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公开(公告)号：US07302013B2
公开(公告)日：2007-11-27
申请号：US10747931
申请日：2003-12-30
申请人： Henry Samueli , Alan Y. Kwentus , Thomas D. Kwon
发明人： Henry Samueli , Alan Y. Kwentus , Thomas D. Kwon
IPC分类号： H03K9/00
CPC分类号： H04H40/90 , H04L7/033 , H04L27/0014 , H04L2027/0057
摘要： Digital signal processing for television signals includes digital feedback loops. Analog information signals are oversampled to provide digital signals. The digital signals are introduced to a digital carrier recovery loop and a digital symbol recovery loop. The gain of the digital signals is also regulated in a feedback loop. The digital signals are processed to recover the data in the data signals. The use of digital feedback loops allows information recovered from the digital signals to be precise. Carrier signals can be directly demodulated to produce baseband inphase and quadrature signals, or first downconverted to produce intermediate frequency signals.
摘要翻译： 电视信号的数字信号处理包括数字反馈回路。 模拟信息信号被过采样以提供数字信号。 数字信号被引入到数字载波恢复环路和数字符号恢复环路。 数字信号的增益也在反馈环路中调节。 处理数字信号以恢复数据信号中的数据。 使用数字反馈回路允许从数字信号中恢复的信息是精确的。 载波信号可以被直接解调以产生基带同相和正交信号，或者首先下变频以产生中频信号。
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公开(公告)号：US20100033359A1
公开(公告)日：2010-02-11
申请号：US12341550
申请日：2008-12-22
IPC分类号： H03M1/12
CPC分类号： H03M1/1038 , H03M1/12
摘要： An apparatus for converting an analog signal to a digital signal comprising a first analog to digital converter for generating a first digital value from an analog value. A second analog to digital converter for generating a second digital value from the analog value. Logic for determining a correction factor for the second digital value based on a difference between the first digital value and the second digital value, wherein the logic updates the correction factor.
摘要翻译： 一种用于将模拟信号转换为数字信号的装置，包括用于从模拟值产生第一数字值的第一模数转换器。 第二模数转换器，用于从模拟值产生第二数字值。 用于基于第一数字值和第二数字值之间的差确定第二数字值的校正因子的逻辑，其中逻辑更新校正因子。
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