公开(公告)号：US07615440B2

公开(公告)日：2009-11-10

申请号：US11851969

申请日：2007-09-07

Applicant: Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

Inventor： Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

IPC: H01L21/8242

CPC classification number: H01G4/228 ,  H01G4/33 ,  H01L21/76838 ,  H01L27/0233 ,  H01L27/1085 ,  Y10T29/417

Abstract: In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.

Abstract translation: 在制造半导体器件的方法中，在间隔电介质内形成金属层。 金属层包括通过层间电介质的区域与第二金属线分离的第一金属线。 在第一金属线和第二金属线之间去除层间电介质的区域。 在去除了层间电介质的区域中的第一金属线和第二金属线之间形成高k电介质，使得由第一金属线，第二金属线和高k电介质形成电容器。

公开(公告)号：US20070294871A1

公开(公告)日：2007-12-27

申请号：US11851969

申请日：2007-09-07

Applicant: Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

Inventor： Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

IPC: H01G9/004

CPC classification number: H01G4/228 ,  H01G4/33 ,  H01L21/76838 ,  H01L27/0233 ,  H01L27/1085 ,  Y10T29/417

Abstract: In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.

Abstract translation: 在制造半导体器件的方法中，在间隔电介质内形成金属层。 金属层包括通过层间电介质的区域与第二金属线分离的第一金属线。 在第一金属线和第二金属线之间去除层间电介质的区域。 在去除了层间电介质的区域中的第一金属线和第二金属线之间形成高k电介质，使得由第一金属线，第二金属线和高k电介质形成电容器。

公开(公告)号：US20060079086A1

公开(公告)日：2006-04-13

申请号：US10964157

申请日：2004-10-12

Applicant: Christian Boit ,  Theodore Lundquist ,  Chun-Cheng Tsao ,  Uwe Kerst ,  Stephan Schoemann ,  Peter Sadewater

Inventor： Christian Boit ,  Theodore Lundquist ,  Chun-Cheng Tsao ,  Uwe Kerst ,  Stephan Schoemann ,  Peter Sadewater

IPC: H01L21/44 ,  H01L21/4763

CPC classification number: H01J37/228 ,  H01J37/3056 ,  H01J2237/2482 ,  H01J2237/31749 ,  H01L21/76892 ,  H01L21/76898

Abstract: Localized trenches or access holes are milled in a semiconductor substrate to define access points to structures of an integrated circuit intended for circuit editing. A conductor is deposited, such as with a focused ion beam tool, in the access holes and a localized heat is applied to the conductor for silicide formation, especially at the boundary between a semiconductor structure, such as diffusion regions, and the deposited conductor. Localized heat may be generated at the target location through precise laser application, current generation through the target location, or a combination thereof.

Abstract translation: 在半导体衬底中研磨局部沟槽或接入孔以限定用于电路编辑的集成电路的结构的接入点。 导电体如聚焦离子束工具沉积在入口孔中，并且局部热被施加到用于硅化物形成的导体上，特别是在诸如扩散区域的半导体结构与沉积导体之间的边界处。 可以通过精确的激光施加，通过目标位置的电流产生或其组合在目标位置产生局部化的热量。

公开(公告)号：US06693017B1

公开(公告)日：2004-02-17

申请号：US10407587

申请日：2003-04-04

Applicant: Mohammed Fazil Fayaz ,  Haining Yang ,  Uwe Kerst ,  Joseph J. Mezzapelle

Inventor： Mohammed Fazil Fayaz ,  Haining Yang ,  Uwe Kerst ,  Joseph J. Mezzapelle

IPC: H01L2120

CPC classification number: H01L28/40 ,  H01L27/0805

Abstract: A MIM capacitor includes a bottom plate, a capacitor dielectric disposed over the bottom plate, and a top plate disposed over the capacitor dielectric. An etch stop material is disposed over the top plate, and the top plate has a width that is less than the width of the etch stop material width. The top plate edges may be pulled back during the removal of the resist used to pattern the top plate, by the addition of chemistries in the resist etch that are adapted to pull-back or undercut the top plate edges beneath the etch stop material.

Abstract translation: MIM电容器包括底板，设置在底板上的电容器电介质和设置在电容器电介质上的顶板。 蚀刻停止材料设置在顶板上方，并且顶板的宽度小于蚀刻停止材料宽度的宽度。 在去除用于图案化顶板的抗蚀剂时，顶板边缘可以被拉回，通过在抗蚀剂蚀刻中添加适于在蚀刻停止材料下面的顶板边缘进行拉回或削切的化学物质。

公开(公告)号：US07268383B2

公开(公告)日：2007-09-11

申请号：US10370535

申请日：2003-02-20

Applicant: Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

Inventor： Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

IPC: H01L27/108 ,  H01L29/76

CPC classification number: H01G4/228 ,  H01G4/33 ,  H01L21/76838 ,  H01L27/0233 ,  H01L27/1085 ,  Y10T29/417

Abstract: Semiconductor devices having capacitors formed of a high-k dielectric and a pair of interconnections on either side of the dielectric are provided along with methods of fabricating such semiconductor devices. The interconnections comprise a via and a metal layer.

Abstract translation: 具有由高k电介质形成的电容器和在电介质两侧的一对互连件的半导体器件与制造这种半导体器件的方法一起提供。 互连包括通孔和金属层。