公开(公告)号：US20050173809A1

公开(公告)日：2005-08-11

申请号：US11038299

申请日：2005-01-19

申请人： Yukihiro Yamamoto ,  Keiji Iwata ,  Yukio Sasaki ,  Kohei Tatsumi ,  Vivek Dutta ,  Tomofumi Jin ,  Koji Nakamura ,  Shinji Inaba

发明人： Yukihiro Yamamoto ,  Keiji Iwata ,  Yukio Sasaki ,  Kohei Tatsumi ,  Vivek Dutta ,  Tomofumi Jin ,  Koji Nakamura ,  Shinji Inaba

IPC分类号： H01L23/12 ,  H01L21/48 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485

CPC分类号： H01L24/05 ,  H01L21/56 ,  H01L23/293 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1316 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/1146

摘要： This invention is aimed at providing a wafer-level package which is capable of relaxing the stress in a chip-size package and exalting the reliability of the operation of mounting on a printed board and a method for the production thereof. This invention is directed toward a wafer-level package of a semiconductor substrate possessed of either or both of an electrode part and a wiring layer connected to an electrode part, which is provided on the semiconductor substrate with an insulating layer formed mainly of a fluorene skeleton-containing resin and on the electrode part with one step or a plurality of steps of posts, and on the posts with bumps formed of electroconductive balls and a method for the production thereof.

摘要翻译： 本发明的目的在于提供一种晶片级封装，其能够缓解芯片尺寸封装中的应力，并提高安装在印刷电路板上的操作的可靠性及其制造方法。 本发明涉及一种具有电极部分和与电极部分连接的布线层中的任一者或两者的半导体基板的晶片级封装，该半导体基板设置在主要由芴骨架形成的绝缘层的半导体基板上 并且在具有一步或多个台阶的电极部分上，以及在由导电球形成的凸起的柱上和其制造方法之间。