公开(公告)号：US06448851B1

公开(公告)日：2002-09-10

申请号：US09934183

申请日：2001-08-21

申请人： James Alexander McIntosh ,  Wayne Tien-Feng Chen ,  Roy Clifton Jones, III

发明人： James Alexander McIntosh ,  Wayne Tien-Feng Chen ,  Roy Clifton Jones, III

IPC分类号： H03K312

CPC分类号： H03F3/2171 ,  H03F1/301 ,  H03F3/2173 ,  H03F2200/516

摘要： A high voltage output stage amplifier that maximizes the output voltage swing when the peak-to-peak output voltage signal is higher than the supply voltage used in the signal conditioning circuits of the amplifier. The amplifier allows the maximum peak-to-peak swing on the output stage by shifting the quiescent voltage of the output stage to the midpoint of the output supply voltage. The shift is accomplished by tapping an offset current at the input of the error integrating stage of the amplifier proportional to the difference in the two power supply voltages.

摘要翻译： 一个高压输出级放大器，当峰峰值输出电压信号高于放大器的信号调理电路中使用的电源电压时，输出电压摆幅最大化。 放大器通过将输出级的静态电压转换为输出电源电压的中点，允许输出级上的最大峰 - 峰摆幅。 通过在与两个电源电压的差成比例的放大器的误差积分级的输入处点击偏移电流来实现移位。

公开(公告)号：US08890248B2

公开(公告)日：2014-11-18

申请号：US10926916

申请日：2004-08-26

申请人： Timothy Patrick Pauletti ,  Sameer Pendharkar ,  Wayne Tien-Feng Chen ,  Jonathan Brodsky ,  Robert Steinhoff

发明人： Timothy Patrick Pauletti ,  Sameer Pendharkar ,  Wayne Tien-Feng Chen ,  Jonathan Brodsky ,  Robert Steinhoff

IPC分类号： H01L23/62 ,  H01L29/74 ,  H01L27/02 ,  H01L29/87 ,  H01L29/749

CPC分类号： H01L27/0262 ,  H01L29/7436 ,  H01L29/749 ,  H01L29/87 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge (ESD) device for protecting an input/output terminal of a circuit, the device comprising a first transistor with an integrated silicon-controlled rectifier (SCR) coupled between the input/output (I/O) terminal of the circuit and a node and a second transistor with an integrated silicon-controlled rectifier coupled between the node and a negative terminal of a supply voltage, wherein the silicon-controlled rectifier of the first transistor triggers in response to a negative ESD voltage and the silicon-controlled rectifier of the second transistor triggers in response to a positive ESD voltage.

摘要翻译： 一种用于保护电路的输入/输出端子的静电放电（ESD）装置，该装置包括：第一晶体管，其具有耦合在电路的输入/输出（I / O）端子之间的集成硅控整流器（SCR） 节点和第二晶体管，其具有耦合在所述节点和电源电压的负端子之间的集成硅控整流器，其中所述第一晶体管的所述硅控整流器响应于ESD ESD电压而触发，并且所述可硅可控整流器 的第二晶体管响应于正的ESD电压而触发。

公开(公告)号：US07567105B2

公开(公告)日：2009-07-28

申请号：US11317972

申请日：2005-12-23

申请人： Narasimhan R. Trichy ,  Wayne Tien-Feng Chen

发明人： Narasimhan R. Trichy ,  Wayne Tien-Feng Chen

IPC分类号： H03K3/00

CPC分类号： H04L25/0276 ,  G06F13/4072 ,  H04L12/40013 ,  H04L12/40032 ,  H04L2012/40215 ,  H04L2012/40273

摘要： A CAN receiver architecture design that provides better immunity against EMI interference than conventional designs is disclosed herein. This CAN receiver includes a voltage divider network connected to a front-end amplifier for dividing down the input signal from a two wire line by a predetermined amount and amplifying the signal by the same predetermined amount. The front-end amplifier generates the common-mode voltage of the input signal for a reference generator that determines the logic level of the incoming signal and subtracts a bandgap voltage reference from the common-mode voltage. A comparator compares the difference between the output of the front-end amplifier and the resultant signal generated by the reference generator to generate an output signal for the receiver. This CAN receiver architecture is faster than conventional designs and possesses an improved common-mode rejection, while operating over a wide input common mode range.

摘要翻译： 本文公开了提供比常规设计更好的抵抗EMI干扰的CAN接收器架构设计。 该CAN接收机包括连接到前端放大器的分压器网络，用于将来自两条线的输入信号除以预定量，并以相同的预定量放大信号。 前端放大器产生用于参考发生器的输入信号的共模电压，其确定输入信号的逻辑电平，并从共模电压中减去带隙电压基准。 比较器比较前端放大器的输出与由参考发生器产生的合成信号之间的差异，以产生接收机的输出信号。 该CAN接收器架构比传统设计更快，并且在宽输入共模范围内工作时具有改进的共模抑制。

公开(公告)号：US06211728B1

公开(公告)日：2001-04-03

申请号：US09441619

申请日：1999-11-16

申请人： Wayne Tien-Feng Chen ,  Marco Corsi ,  Roy Clifton Jones, III ,  Michael David Score

发明人： Wayne Tien-Feng Chen ,  Marco Corsi ,  Roy Clifton Jones, III ,  Michael David Score

IPC分类号： H03F338

CPC分类号： H03F3/2173 ,  H03F3/2171 ,  H03F2200/384

摘要： A Class-D switching amplifier (20) having a terinary modulation scheme implemented in an H-bridge configuration. The present invention has four states of operation, and achieves increased efficiency and reduced cost by delivering current to the load only when needed, and once delivered, maintaining the current. The Class-D switching amplifier eliminates the need for post amplifier filters.

摘要翻译： 具有以H桥配置实现的二进制调制方案的D类开关放大器（20）。 本发明具有四种操作状态，通过仅在需要时将电流传递到负载，并且一旦传送，保持电流，就可以实现提高效率并降低成本。 D类开关放大器无需后置放大器滤波器。

公开(公告)号：US07242227B2

公开(公告)日：2007-07-10

申请号：US10979696

申请日：2004-11-01

申请人： Timothy P. Pauletti ,  John H. Carpenter, Jr. ,  Wayne Tien-Feng Chen

发明人： Timothy P. Pauletti ,  John H. Carpenter, Jr. ,  Wayne Tien-Feng Chen

IPC分类号： H03K3/00

CPC分类号： H04L25/085 ,  H04L25/0284

摘要： A differential bus network, in general, or a controller area network (CAN) driver, in particular, controls and minimizes the variation on the common-mode signal of the CAN bus. This CAN driver also provides improved symmetry between its differential output signals, CANH and CANL, and provides protection for its low voltage devices from voltage transients occurring on its output lines. The common-mode signal is sensed and buffered, then during the dominant to recessive transition, the bus signals are shorted to the buffered common mode voltage. Specifically, additional switches or transistors are used to pull the differential output signals, CANH and CANL, to the common mode signal VCM when the state of the CAN bus transitions from dominant to recessive. This improvement minimizes high frequency spikes in the common-mode signal and eliminates DC shifts during transitions of the state of the CAN bus. A driver system may include a plurality of CAN drivers are serially interconnected to form a driver system, wherein each downstream driver stage receives a time-delayed form of the digital input signal TxD, each stage providing a time-delayed contribution to the differential output signals of the overall driver system.

摘要翻译： 通常，差分总线网络或控制器局域网（CAN）驱动器特别地控制并最小化CAN总线的共模信号的变化。 该CAN驱动器还提供其差分输出信号CANH和CANL之间的对称性，并为其低电压器件提供对其输出线路上出现的电压瞬变的保护。 共模信号被感测和缓冲，然后在显性到隐性转变期间，总线信号被短路到缓冲的共模电压。 具体地说，当CAN总线的状态从主导转变为隐性时，额外的开关或晶体管用于将差分输出信号CANH和CANL拉到共模信号V SUB CM。 这种改进使共模信号中的高频峰值最小化，并消除了CAN总线状态转换期间的直流偏移。 驱动器系统可以包括多个CAN驱动器串行互连以形成驱动器系统，其中每个下游驱动器级接收时间延迟形式的数字输入信号TxD，每个级提供对差分输出信号的时间延迟贡献 的整体驱动系统。

公开(公告)号：US07133268B2

公开(公告)日：2006-11-07

申请号：US10725164

申请日：2003-12-01

申请人： Rex M. Teggatz ,  Wayne Tien-Feng Chen ,  Joseph Devore

发明人： Rex M. Teggatz ,  Wayne Tien-Feng Chen ,  Joseph Devore

IPC分类号： H02H3/20 ,  H02H9/04

CPC分类号： B60T8/36

摘要： System and method for controlling current across a load. A preferred embodiment comprises a current varying circuit (such as current varying circuit 525) that can create a sequence of voltage drops in a driver circuit (such as the driver circuit 505) coupled to an inductive load (such as the inductive load 535). By initially producing a large voltage drop and then stepping the voltage drop down gradually, the current in the inductive load can be rapidly removed without producing a current undershoot, which, in certain applications, can result in unwanted noise and vibration.

摘要翻译： 用于控制负载电流的系统和方法。 优选实施例包括电流变化电路（例如电流变化电路525），其可以在耦合到感性负载（例如感性负载535）的驱动器电路（例如驱动器电路505）中产生一系列电压降。 通过初始产生大的电压降，然后逐渐降低电压降，电感负载中的电流可以快速去除，而不产生电流下冲，在某些应用中，这可能导致不必要的噪声和振动。

公开(公告)号：US20050117265A1

公开(公告)日：2005-06-02

申请号：US10725164

申请日：2003-12-01

申请人： Rex Teggatz ,  Wayne Tien-Feng Chen ,  Joseph Devore

发明人： Rex Teggatz ,  Wayne Tien-Feng Chen ,  Joseph Devore

IPC分类号： B60T8/36 ,  H02H3/20

CPC分类号： B60T8/36

摘要： System and method for controlling current across a load. A preferred embodiment comprises a current varying circuit (such as current varying circuit 525) that can create a sequence of voltage drops in a driver circuit (such as the driver circuit 505) coupled to an inductive load (such as the inductive load 535). By initially producing a large voltage drop and then stepping the voltage drop down gradually, the current in the inductive load can be rapidly removed without producing a current undershoot, which, in certain applications, can result in unwanted noise and vibration.

摘要翻译： 用于控制负载电流的系统和方法。 优选实施例包括电流变化电路（例如电流变化电路525），其可以在耦合到感性负载（例如感性负载535）的驱动器电路（例如驱动器电路505）中产生一系列电压降。 通过初始产生大的电压降，然后逐渐降低电压降，电感负载中的电流可以快速去除，而不产生电流下冲，在某些应用中，这可能导致不必要的噪声和振动。

公开(公告)号：US06727752B2

公开(公告)日：2004-04-27

申请号：US10156926

申请日：2002-05-29

申请人： David L. Skinner ,  Wayne Tien-Feng Chen ,  David A. Grant ,  Vadim Ivanov

发明人： David L. Skinner ,  Wayne Tien-Feng Chen ,  David A. Grant ,  Vadim Ivanov

IPC分类号： H03F3217

CPC分类号： H03F3/2173 ,  H02M1/083 ,  H02M1/44 ,  H02M3/158 ,  H02M2001/0045 ,  H02M2003/1555

摘要： A modulation scheme can drive an associated load that is coupled between a pair of outputs by providing a switching signal at one of the outputs and a non-switching signal at the other output independent of the direction of current relative to the respective outputs. Because switching occurs only at one of the outputs in this mode of operation, a single filter can be used to mitigate switching noise at the switching output. Another aspect relates to another mode of operation in which one or both of the outputs can be controlled to operate linearly, such as during a zero crossing condition, so as to help reduce crossover distortion.

摘要翻译： 调制方案可以通过在输出之一处提供切换信号和在另一输出处提供非切换信号来驱动耦合在一对输出之间的相关联的负载，而不依赖于相对于各个输出的电流方向。 因为在这种工作模式下，仅在其中一个输出进行切换，所以可以使用单个滤波器来减轻开关输出端的开关噪声。 另一方面涉及另一种操作模式，其中一个或两个输出可被控制为线性运行，例如在零交叉状态期间，以帮助减少交叉失真。

公开(公告)号：US06262632B1

公开(公告)日：2001-07-17

申请号：US09441620

申请日：1999-11-16

申请人： Marco Corsi ,  Wayne Tien-Feng Chen ,  Roy Clifton Jones, III ,  Dan Mavencamp ,  Kenneth Arcudia

发明人： Marco Corsi ,  Wayne Tien-Feng Chen ,  Roy Clifton Jones, III ,  Dan Mavencamp ,  Kenneth Arcudia

IPC分类号： H03F3217

CPC分类号： H03F3/2171 ,  H03F3/2173 ,  H03F2200/351 ,  H03F2200/384

摘要： A Class-D switching amplifier (30, 40) having a ternary mode of operation. Signal processing (21, 22) is provided to eliminate the potential of crosstalk within one channel by introducing a time delay into the system. A susceptible crosstalk point is moved away from a zero-crossing point to a higher power level, which is advantageous in low-end audio applications. A time delay is introduced to one ramp signal (RAMPB) in the first implementation (30), and an in-sync generator (42) is utilized in another implementation (40) using offset switching in the comparitors (40, 42) to create the time delay (&Dgr;t).

摘要翻译： 具有三元操作模式的D类开关放大器（30,40）。 提供信号处理（21,22）以通过在系统中引入时间延迟来消除一个通道内串扰的可能性。 敏感串扰点从过零点移动到更高的功率电平，这在低端音频应用中是有利的。 在第一实现（30）中将时间延迟引入到一个斜坡信号（RAMPB），并且在另一实现（40）中使用同步发生器（42），使用比较器（40,42）中的偏移切换来创建 时间延迟（DELTAt）。

公开(公告)号：US07995316B2

公开(公告)日：2011-08-09

申请号：US12471948

申请日：2009-05-26

申请人： John H. Carpenter, Jr. ,  Wayne Tien-Feng Chen ,  Andrew D. Mitchell

发明人： John H. Carpenter, Jr. ,  Wayne Tien-Feng Chen ,  Andrew D. Mitchell

IPC分类号： H02H9/00

CPC分类号： H01L27/0255

摘要： An integrated electrostatic discharge (ESD) device includes a first ESD structure coupled to a pad terminal of the integrated ESD device and a second ESD structure coupled to a ground terminal of the integrated ESD device. The integrated ESD device also comprises a diffusion region that is shared by each of the first ESD structure and the second ESD structure, such that the shared diffusion region forms a portion of at least one semiconductor junction associated with each of the first ESD structure and the second ESD structure.

摘要翻译： 集成静电放电（ESD）器件包括耦合到集成ESD器件的焊盘端子的第一ESD结构和耦合到集成ESD器件的接地端子的第二ESD结构。 集成ESD器件还包括由第一ESD结构和第二ESD结构中的每一个共享的扩散区域，使得共享扩散区域形成与第一ESD结构和第二ESD结构中的每一个相关联的至少一个半导体结的一部分， 第二ESD结构。