公开(公告)号：US20100232246A1

公开(公告)日：2010-09-16

申请号：US12651043

申请日：2009-12-31

申请人： Won Kyung CHUNG

发明人： Won Kyung CHUNG

IPC分类号： G11C7/00

CPC分类号： G11C7/04 ,  G11C11/406 ,  G11C11/40626

摘要： A refresh control circuit of a semiconductor memory apparatus includes: a variable oscillator configured to generate a room-temperature oscillation signal and a limit-temperature oscillation signal in response to a temperature state signal; a cycle selector configured to selectively output the room temperature oscillation signal and the limit-temperature oscillation signal as a variable oscillation signal in response to the temperature state signal; a refresh signal generator configured to generate a refresh signal in response to the variable oscillation signal and a fixed oscillation signal; and a temperature state detector configured to generate the temperature state signal by detecting current temperature in response to the room-temperature oscillation signal and the fixed oscillation signal.

摘要翻译： 半导体存储装置的刷新控制电路包括：可变振荡器，被配置为响应于温度状态信号产生室温振荡信号和极限温度振荡信号; 循环选择器，其被配置为响应于所述温度状态信号选择性地输出所述室温振荡信号和所述极限温度振荡信号作为可变振荡信号; 刷新信号发生器，被配置为响应于所述可变振荡信号和固定振荡信号产生刷新信号; 以及温度状态检测器，其被配置为通过响应于室温振荡信号和固定振荡信号检测当前温度来产生温度状态信号。

公开(公告)号：US07863914B2

公开(公告)日：2011-01-04

申请号：US12003899

申请日：2008-01-03

申请人： Young-hun Seo ,  Won-kyung Chung ,  Han-na Park

发明人： Young-hun Seo ,  Won-kyung Chung ,  Han-na Park

IPC分类号： G01R31/02

CPC分类号： G01R31/31715 ,  G11C29/56 ,  G11C2029/5602

摘要： Example embodiments relate to a semiconductor memory device including a first pad having a probe region and a sensing region, the first pad may be adapted to come in contact with a primary probe, a sensing unit adapted to sense a weak contact of the first pad and the primary probe, the sensing unit may generate an output current in response to a contact point of the primary probe, and a second pad may be adapted to come in contact with a secondary probe to input/output an electric signal. The output current of the sensing unit may be output through the second pad or the secondary probe.

摘要翻译： 示例性实施例涉及包括具有探针区域和感测区域的第一焊盘的半导体存储器件，第一焊盘可以适于与主探针接触，感测单元适于感测第一焊盘的弱接触和 主探头，感测单元可以响应于主探针的接触点而产生输出电流，并且第二焊盘可以适于与辅助探针接触以输入/输出电信号。 感测单元的输出电流可以通过第二垫或辅助探针输出。

公开(公告)号：US20110074462A1

公开(公告)日：2011-03-31

申请号：US12844474

申请日：2010-07-27

申请人： Won Kyung Chung

发明人： Won Kyung Chung

IPC分类号： H03K17/16

CPC分类号： H03K19/0005 ,  H03K19/00384

摘要： A data driving impedance auto-calibration circuit includes: a detection block configured to calibrate a characteristic voltage generated by detecting an operation characteristic variation of an element, according to a code signal, and generate a calibrated characteristic voltage; a comparison block configured to compare the calibrated characteristic voltage with a reference voltage and output a comparison result signal; and a code calibration block configured to calibrate the code signal according to the comparison result signal.

摘要翻译： 数据驱动阻抗自动校准电路包括：检测块，被配置为根据代码信号校准通过检测元件的操作特性变化产生的特征电压，并产生校准的特征电压; 比较块，配置为将校准的特征电压与参考电压进行比较，并输出比较结果信号; 以及代码校准块，被配置为根据比较结果信号校准代码信号。

公开(公告)号：US20080164897A1

公开(公告)日：2008-07-10

申请号：US12003899

申请日：2008-01-03

申请人： Young-hun Seo ,  Won-kyung Chung ,  Han-na Park

发明人： Young-hun Seo ,  Won-kyung Chung ,  Han-na Park

IPC分类号： G01R31/26

CPC分类号： G01R31/31715 ,  G11C29/56 ,  G11C2029/5602

摘要： Example embodiments relate to a semiconductor memory device including a first pad having a probe region and a sensing region, the first pad may be adapted to come in contact with a primary probe, a sensing unit adapted to sense a weak contact of the first pad and the primary probe, the sensing unit may generate an output current in response to a contact point of the primary probe, and a second pad may be adapted to come in contact with a secondary probe to input/output an electric signal. The output current of the sensing unit may be output through the second pad or the secondary probe.

摘要翻译： 示例性实施例涉及包括具有探针区域和感测区域的第一焊盘的半导体存储器件，第一焊盘可以适于与主探针接触，感测单元适于感测第一焊盘的弱接触和 主探头，感测单元可以响应于主探针的接触点而产生输出电流，并且第二焊盘可以适于与辅助探针接触以输入/输出电信号。 感测单元的输出电流可以通过第二垫或辅助探针输出。

公开(公告)号：US08169846B2

公开(公告)日：2012-05-01

申请号：US12651043

申请日：2009-12-31

申请人： Won Kyung Chung

发明人： Won Kyung Chung

IPC分类号： G11C7/04

CPC分类号： G11C7/04 ,  G11C11/406 ,  G11C11/40626

摘要： A refresh control circuit of a semiconductor memory apparatus includes: a variable oscillator configured to generate a room-temperature oscillation signal and a limit-temperature oscillation signal in response to a temperature state signal; a cycle selector configured to selectively output the room temperature oscillation signal and the limit-temperature oscillation signal as a variable oscillation signal in response to the temperature state signal; a refresh signal generator configured to generate a refresh signal in response to the variable oscillation signal and a fixed oscillation signal; and a temperature state detector configured to generate the temperature state signal by detecting current temperature in response to the room-temperature oscillation signal and the fixed oscillation signal.

摘要翻译： 半导体存储装置的刷新控制电路包括：可变振荡器，被配置为响应于温度状态信号产生室温振荡信号和极限温度振荡信号; 循环选择器，其被配置为响应于所述温度状态信号选择性地输出所述室温振荡信号和所述极限温度振荡信号作为可变振荡信号; 刷新信号发生器，被配置为响应于所述可变振荡信号和固定振荡信号产生刷新信号; 以及温度状态检测器，其被配置为通过响应于室温振荡信号和固定振荡信号检测当前温度来产生温度状态信号。

公开(公告)号：US20080165596A1

公开(公告)日：2008-07-10

申请号：US12000648

申请日：2007-12-14

申请人： Kwun-soo Cheon ,  Chang-yong Lee ,  Won-kyung Chung

发明人： Kwun-soo Cheon ,  Chang-yong Lee ,  Won-kyung Chung

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C29/34 ,  G11C29/1201 ,  G11C2029/0405 ,  G11C2029/2602

摘要： A semiconductor memory device and method thereof are provided. The example semiconductor memory device may include a memory cell array including a plurality of memory cells, an expected data generating unit receiving a plurality of initial expected data through at least one address pad during a memory operation and generating a plurality of expected data based on the plurality of initial expected data, the at least one address pad being separate from a data input/output pad and a parallel bit test circuit generating test result data based on a plurality of read data and the plurality of expected data.

摘要翻译： 提供一种半导体存储器件及其方法。 示例性半导体存储器件可以包括包括多个存储器单元的存储单元阵列，期望数据生成单元在存储器操作期间通过至少一个地址焊盘接收多个初始期望数据，并且基于该存储器单元产生多个预期数据 多个初始预期数据，所述至少一个地址焊盘与数据输入/输出焊盘分离，并且并行位测试电路基于多个读取数据和多个预期数据产生测试结果数据。

公开(公告)号：US08278967B2

公开(公告)日：2012-10-02

申请号：US12844474

申请日：2010-07-27

申请人： Won Kyung Chung

发明人： Won Kyung Chung

IPC分类号： H03K17/16 ,  H03K19/003

CPC分类号： H03K19/0005 ,  H03K19/00384

摘要： A data driving impedance auto-calibration circuit includes: a detection block configured to calibrate a characteristic voltage generated by detecting an operation characteristic variation of an element, according to a code signal, and generate a calibrated characteristic voltage; a comparison block configured to compare the calibrated characteristic voltage with a reference voltage and output a comparison result signal; and a code calibration block configured to calibrate the code signal according to the comparison result signal.

摘要翻译： 数据驱动阻抗自动校准电路包括：检测块，被配置为根据代码信号校准通过检测元件的操作特性变化产生的特征电压，并产生校准的特征电压; 比较块，配置为将校准的特征电压与参考电压进行比较，并输出比较结果信号; 以及代码校准块，被配置为根据比较结果信号校准代码信号。

公开(公告)号：US20110089964A1

公开(公告)日：2011-04-21

申请号：US12980437

申请日：2010-12-29

申请人： Young-hun SEO ,  Won-kyung Chung ,  Han-na Park

发明人： Young-hun SEO ,  Won-kyung Chung ,  Han-na Park

IPC分类号： G01R31/20

CPC分类号： G01R31/31715 ,  G11C29/56 ,  G11C2029/5602

摘要： Example embodiments relate to a semiconductor memory device including a first pad having a probe region and a sensing region, the first pad may be adapted to come in contact with a primary probe, a sensing unit adapted to sense a weak contact of the first pad and the primary probe, the sensing unit may generate an output current in response to a contact point of the primary probe, and a second pad may be adapted to come in contact with a secondary probe to input/output an electric signal. The output current of the sensing unit may be output through the second pad or the secondary probe.

摘要翻译： 示例性实施例涉及包括具有探针区域和感测区域的第一焊盘的半导体存储器件，第一焊盘可以适于与主探针接触，感测单元适于感测第一焊盘的弱接触和 主探头，感测单元可以响应于主探针的接触点而产生输出电流，并且第二焊盘可以适于与辅助探针接触以输入/输出电信号。 感测单元的输出电流可以通过第二垫或辅助探针输出。

公开(公告)号：US07783944B2

公开(公告)日：2010-08-24

申请号：US12000648

申请日：2007-12-14

申请人： Kwun-soo Cheon ,  Chang-yong Lee ,  Won-kyung Chung

发明人： Kwun-soo Cheon ,  Chang-yong Lee ,  Won-kyung Chung

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/34 ,  G11C29/1201 ,  G11C2029/0405 ,  G11C2029/2602

摘要： A semiconductor memory device and method thereof are provided. The example semiconductor memory device may include a memory cell array including a plurality of memory cells, an expected data generating unit receiving a plurality of initial expected data through at least one address pad during a memory operation and generating a plurality of expected data based on the plurality of initial expected data, the at least one address pad being separate from a data input/output pad and a parallel bit test circuit generating test result data based on a plurality of read data and the plurality of expected data.

摘要翻译： 提供一种半导体存储器件及其方法。 示例性半导体存储器件可以包括包括多个存储器单元的存储单元阵列，期望数据生成单元在存储器操作期间通过至少一个地址焊盘接收多个初始期望数据，并且基于该存储器单元产生多个预期数据 多个初始预期数据，所述至少一个地址焊盘与数据输入/输出焊盘分离，并且并行位测试电路基于多个读取数据和多个预期数据产生测试结果数据。