Method and apparatus for allocating sequence to synchronization channel for node identification in wireless communication system
    3.
    发明授权
    Method and apparatus for allocating sequence to synchronization channel for node identification in wireless communication system 有权
    用于在无线通信系统中为节点识别的同步信道分配序列的方法和装置

    公开(公告)号:US08761111B2

    公开(公告)日:2014-06-24

    申请号:US13596296

    申请日:2012-08-28

    IPC分类号: H04W4/00

    摘要: Provided is an apparatus for allocating a sequence to a synchronization channel for a node identification (ID), the apparatus including: a base node sequence generator to generate a base sequence that is a sequence for a node ID of a base node; a relay node sequence generator to generate a relay sequence that is a sequence for a node ID of a relay node by transforming the base sequence; a baseband signal generator to generate a baseband signal by mapping the base sequence or the relay sequence to a frequency domain and a time domain; and a transmitter to transmit the baseband signal.

    摘要翻译: 提供了一种用于将序列分配给用于节点标识(ID)的同步信道的装置,所述装置包括:基本节点序列生成器,用于生成作为基本节点的节点ID的序列的基本序列; 中继节点序列发生器,用于通过转换所述基本序列来产生作为中继节点的节点ID的序列的中继序列; 基带信号发生器,用于通过将基本序列或中继序列映射到频域和时域来产生基带信号; 以及用于发送基带信号的发射机。

    Frame generation apparatus and method of protecting protocol header information over wideband high frequency wireless system
    7.
    发明授权
    Frame generation apparatus and method of protecting protocol header information over wideband high frequency wireless system 失效
    通过宽带高频无线系统保护协议报头信息的帧生成装置和方法

    公开(公告)号:US08630309B2

    公开(公告)日:2014-01-14

    申请号:US12556958

    申请日:2009-09-10

    IPC分类号: H04J3/16

    摘要: Provided are a frame generation apparatus and method that may protect variable length header information in a wideband high frequency wireless system. The frame generation apparatus may report variable length header information of a frame, and thereby the variable length header information may be verified in a receiving device. Also, the frame generation apparatus may convert a variable length header into a fixed length header by adding padding information to the variable length header of a frame, thereby protecting variable length header information.

    摘要翻译: 提供了一种可以在宽带高频无线系统中保护可变长度报头信息的帧生成装置和方法。 帧生成装置可以报告帧的可变长度报头信息,从而可以在接收装置中验证可变长度报头信息。 此外,帧生成装置可以通过将填充信息添加到帧的可变长度头部来将可变长度头部转换为固定长度头部,从而保护可变长度头部信息。

    Hybrid prediction apparatus and method for entropy encoding
    8.
    发明授权
    Hybrid prediction apparatus and method for entropy encoding 有权
    用于熵编码的混合预测装置和方法

    公开(公告)号:US08542935B2

    公开(公告)日:2013-09-24

    申请号:US12953163

    申请日:2010-11-23

    IPC分类号: G06K9/36

    CPC分类号: H04N19/91 H04N19/593

    摘要: Provided are a hybrid prediction apparatus and method for entropy encoding that may enhance an existing image compression scheme and prediction scheme by including and selectively using a plurality of predictors configured to perform a per-pixel prediction of an image frame, and may also supplement a performance of a prediction scheme, excessively occurring in a particular pixel.

    摘要翻译: 提供了一种用于熵编码的混合预测装置和方法,其可以通过包括并选择性地使用被配置为执行图像帧的每像素预测的多个预测器来增强现有图像压缩方案和预测方案,并且还可以补充性能 的预测方案,在特定像素中过度发生。

    Apparatus and method for obtaining maximum value and minimum value in plurality of digital input signals
    9.
    发明授权
    Apparatus and method for obtaining maximum value and minimum value in plurality of digital input signals 失效
    用于获得多个数字输入信号中的最大值和最小值的装置和方法

    公开(公告)号:US08471594B2

    公开(公告)日:2013-06-25

    申请号:US13339394

    申请日:2011-12-29

    IPC分类号: H01L25/00

    CPC分类号: H03K19/23

    摘要: The present invention relates to a digital signal processing circuit, and more particularly, to a method and apparatus for generating a maximum value or a minimum value used for designing the digital signal processing circuit. An apparatus for obtaining a maximum value or a minimum value from N digital input signals may include N×W bit processing elements to receive an input of W bits of each of the N digital input signals, W OR operators to receive an input of N operation values output from bit processing elements, and to perform an OR operation, respectively, and W inverters to invert an output value for each of the W OR operators.

    摘要翻译: 数字信号处理电路技术领域本发明涉及数字信号处理电路,更具体地,涉及一种用于产生用于设计数字信号处理电路的最大值或最小值的方法和装置。 用于从N个数字输入信号获得最大值或最小值的装置可以包括N×W位处理元件,以接收每个N个数字输入信号的W位的输入,W或运算符以接收N个操作的输入 分别从位处理元件输出的值,并且分别执行或运算,W反相器反转每个W OR运算符的输出值。

    Wing assembly and apparatus for launching flying object using the same
    10.
    发明授权
    Wing assembly and apparatus for launching flying object using the same 有权
    翼组件和使用其的飞行物体的发射装置

    公开(公告)号:US08415597B2

    公开(公告)日:2013-04-09

    申请号:US12779346

    申请日:2010-05-13

    IPC分类号: F42B10/00

    CPC分类号: F42B10/14

    摘要: Disclosed are a wing assembly including a wing movably accommodated in a launch tube, and a buffer unit detachably mounted to the wing to come in contact with the launch tube and configured to be separated from the wing after the wing comes out of an inner space of the launch tube, and an apparatus for launching a flying object having the same.

    摘要翻译: 公开了一种机翼​​组件,其包括可移动地容纳在发射管中的机翼,以及缓冲单元,其可拆卸地安装到机翼以与发射管接触并且构造成在机翼从机翼从内部空间出来之后与机翼分离 发射管,以及用于发射具有该飞行物体的飞行物体的装置。