公开(公告)号：US5721871A

公开(公告)日：1998-02-24

申请号：US598934

申请日：1996-02-09

申请人： Avi Ginsberg ,  Yaniv Shapira ,  Yaron Ben-Arie ,  Benjamin Rosen

发明人： Avi Ginsberg ,  Yaniv Shapira ,  Yaron Ben-Arie ,  Benjamin Rosen

IPC分类号： G06F13/12 ,  G06F13/16 ,  G06F12/14

CPC分类号： G06F13/126 ,  G06F13/1673

摘要： A memory system (3) for storing data messages communicated between a processor unit (13) and a communication module (11) comprises a memory array (4) having a plurality of memory buffers (B0-BM) for storing the data messages. First logic circuitry (28) generates a lock signal for a memory buffer which lock signal is valid when the processor trait (13) reads the first data word of the data message stored in the memory buffer whilst the memory buffer is not being accessed by the communication module (11). Module decode logic (22) coupled to receive the lock signal prevents the communication module (11) from writing a data message to a memory buffer when a valid lock signal has been generated for that memory buffer. The memory system (3) further comprises second logic circuitry (30) for providing a busy signal to the processor unit (13) when the processor unit reads the first data word from a memory buffer. The busy signal forms part of the first data word read from the memory buffer, and its logic state indicates whether or not the memory buffer is being written to by the communication module (11).

摘要翻译： 一种用于存储在处理器单元（13）和通信模块（11）之间传送的数据消息的存储器系统（3）包括具有用于存储数据消息的多个存储器缓冲器（B0-BM）的存储器阵列（4）。 第一逻辑电路（28）产生用于存储器缓冲器的锁定信号，当处理器特征（13）读取存储在存储器缓冲器中的数据消息的第一数据字时，该锁定信号有效，同时存储器缓冲器不被 通信模块（11）。 耦合到接收锁定信号的模块解码逻辑（22）防止当为该存储器缓冲器生成有效的锁定信号时，通信模块（11）将数据消息写入存储器缓冲器。 存储器系统（3）还包括第二逻辑电路（30），用于当处理器单元从存储器缓冲器读取第一数据字时，向处理器单元（13）提供忙信号。 忙信号形成从存储器缓冲器读取的第一数据字的一部分，其逻辑状态指示存储器缓冲器是否被通信模块（11）写入。

公开(公告)号：US20140310439A1

公开(公告)日：2014-10-16

申请号：US14027267

申请日：2013-09-16

申请人： Saeed Bshara ,  Erez Izenberg ,  Yaniv Shapira ,  Nafea Bshara

发明人： Saeed Bshara ,  Erez Izenberg ,  Yaniv Shapira ,  Nafea Bshara

IPC分类号： G06F13/24

CPC分类号： G06F13/24 ,  G06F9/4812 ,  G06F2213/2408

摘要： A method for generating interrupt requests, the method comprising: receiving, by a first circuit, an indication of an occurrence of an interrupt triggering event; determining whether a time difference between the occurrence of the interrupt triggering event and an occurrence of a last interrupt triggering event that preceded the occurrence of the interrupt triggering event exceeded a threshold; generating, by the first circuit, an interrupt request in response to the occurrence of the interrupt triggering event if the time difference exceeded the threshold; and delaying, for a predetermined delay period after a generation of a last interrupt request, a generating of the interrupt request that is responsive to the occurrence of the interrupt triggering event if the time difference is shorter than the threshold.

摘要翻译： 一种用于产生中断请求的方法，所述方法包括：由第一电路接收中断触发事件的发生的指示; 确定中断触发事件的发生与发生中断触发事件之前的最后一个中断触发事件的发生是否超过阈值; 如果所述时间差超过所述阈值，则由所述第一电路产生响应于所述中断触发事件的发生的中断请求; 并且在产生最后一个中断请求之后的预定延迟时间内延迟响应中断触发事件发生的中断请求的产生，如果时间差小于阈值。

公开(公告)号：US07107464B2

公开(公告)日：2006-09-12

申请号：US09902770

申请日：2001-07-10

申请人： Yaniv Shapira ,  Drory Shohat ,  Moshe Zezak ,  Niv Gilboa

发明人： Yaniv Shapira ,  Drory Shohat ,  Moshe Zezak ,  Niv Gilboa

IPC分类号： G06F17/00

CPC分类号： H04L63/0485 ,  H04L63/0272 ,  H04L63/164

摘要： A novel and useful virtual private network (VPN) mechanism and related security association processor for maintaining the necessary security related parameters to perform security functions such as encryption, decryption and authentication. A security association database (SAD) and related circuitry is adapted to provide the necessary parameters to implement the IPSec group of security specifications for encryption/decryption and authentication. Each security association (SA) entry in the database comprises all the parameters that are necessary to receive and transmit VPN packets according to the IPSec specification.

摘要翻译： 一种新颖有用的虚拟专用网（VPN）机制和相关的安全关联处理器，用于维护必要的安全相关参数以执行诸如加密，解密和认证的安全功能。 安全关联数据库（SAD）和相关电路适用于提供必要的参数来实现用于加密/解密和认证的IPSec安全规范组。 数据库中的每个安全关联（SA）条目包括根据IPSec规范接收和发送VPN数据包所需的所有参数。

公开(公告)号：US08930583B1

公开(公告)日：2015-01-06

申请号：US10666655

申请日：2003-09-18

申请人： Yaniv Shapira ,  Hrvoje Billic

发明人： Yaniv Shapira ,  Hrvoje Billic

IPC分类号： G06F3/00

CPC分类号： G06F13/00 ,  G06F3/06 ,  G06F13/385

摘要： A method for controlling data transfer in a serial-ATA system includes using serial-ATA Native Command Queuing (NCQ) to issue a queue of NCQ commands to at least two serial-ATA devices. The commands include a first plurality of commands for a first one of the devices and a second plurality of commands for a second one of the devices. Each of the commands includes a respective port address of one of the at least two devices and a first command identifier identifying a command for the one of the at least two devices. The method further includes receiving a first acknowledgement, which has a port address of a first target device and a second command identifier identifying a first outstanding command for the first target device. Each of the queues of commands is sent to the at least two serial-ATA devices prior to receiving the first acknowledgement.

摘要翻译： 用于控制串行ATA系统中的数据传输的方法包括使用串行ATA本地命令队列（NCQ）向至少两个串行ATA设备发出NCQ命令的队列。 所述命令包括用于所述设备中的第一设备的第一多个命令和用于所述设备中的第二设备的第二多个命令。 每个命令包括至少两个设备中的一个的相应端口地址，以及识别至少两个设备之一的命令的第一命令标识符。 该方法还包括接收具有第一目标设备的端口地址的第一确认和识别第一目标设备的第一未决命令的第二命令标识符。 在接收到第一确认之前，每个命令队列被发送到至少两个串行ATA设备。

公开(公告)号：US09697149B2

公开(公告)日：2017-07-04

申请号：US14027267

申请日：2013-09-16

申请人： Said Bshara ,  Erez Izenberg ,  Yaniv Shapira ,  Nafea Bshara

发明人： Said Bshara ,  Erez Izenberg ,  Yaniv Shapira ,  Nafea Bshara

IPC分类号： G06F13/24 ,  G06F3/06 ,  G06F9/48

CPC分类号： G06F13/24 ,  G06F9/4812 ,  G06F2213/2408

摘要： A method for generating interrupt requests, the method comprising: receiving, by a first circuit, an indication of an occurrence of an interrupt triggering event; determining whether a time difference between the occurrence of the interrupt triggering event and an occurrence of a last interrupt triggering event that preceded the occurrence of the interrupt triggering event exceeded a threshold; generating, by the first circuit, an interrupt request in response to the occurrence of the interrupt triggering event if the time difference exceeded the threshold; and delaying, for a predetermined delay period after a generation of a last interrupt request, a generating of the interrupt request that is responsive to the occurrence of the interrupt triggering event if the time difference is shorter than the threshold.

公开(公告)号：US06738779B1

公开(公告)日：2004-05-18

申请号：US09790064

申请日：2001-02-21

申请人： Yaniv Shapira

发明人： Yaniv Shapira

IPC分类号： G06F1730

CPC分类号： G06F17/30949 ,  G06F17/30985 ,  Y10S707/99942 ,  Y10S707/99943

摘要： An apparatus for and method of simultaneously searching an input character stream for the presence of multiple strings. The strings to be searched for are determined a priori, processed and stored in substring tables during a configuration phase. The strings to be searched for are divided into a plurality of two and three character substrings and stored in substring tables. A hash of each substring is calculated and stored in a hash table whose output is an index to a substring table. During searching, the content filter generates the hash of the input character stream and attempts to find a matching substring stored in the hash table. A string is declared found if all the substrings making up the string have been received in correct consecutive order.

摘要翻译： 一种用于同时搜索输入字符流以存在多个字符串的装置和方法。 在配置阶段期间，要搜索的字符串被先验确定，处理并存储在子字符串表中。 要搜索的字符串被分为多个两个和三个字符的子字符串，并存储在子表中。 计算每个子字符串的散列，并将其存储在输出是子字符表的索引的哈希表中。 在搜索期间，内容过滤器生成输入字符流的散列，并尝试找到存储在哈希表中的匹配子字符串。 如果所有构成字符串的子字符串都以正确的连续顺序被接收，则声明字符串。