公开(公告)号：US20150279899A1

公开(公告)日：2015-10-01

申请号：US14660570

申请日：2015-03-17

申请人： Yong-Chan KIM ,  Seung-Sik KIM ,  Eun-Sub SHIM ,  Moo-Sup LIM

发明人： Yong-Chan KIM ,  Seung-Sik KIM ,  Eun-Sub SHIM ,  Moo-Sup LIM

IPC分类号： H01L27/146 ,  H01L27/148

CPC分类号： H01L27/14683 ,  H01L27/14614 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14689 ,  H01L27/14806 ,  H04N5/3559

摘要： Provided are a unit pixel, an image sensor including the same, a portable electronic device including the same, and a method of manufacturing the same. The method of manufacturing includes: forming a photoelectric conversion region in a substrate; forming, in the substrate, a first floating diffusion region spaced apart from the photoelectric conversion region of the substrate, and a second floating diffusion region spaced apart from the first floating diffusion region; forming a first recess spaced apart from the first floating diffusion region and the second floating diffusion region by removing a portion of the substrate from a first surface of the substrate; filling the first recess to form a dual conversion gain (DCG) gate that extends perpendicularly or substantially perpendicularly from the first surface of the substrate; and forming a conductive layer to fill an inside of the first recess.

摘要翻译： 提供一种单位像素，包括该像素的图像传感器，包括该便携式电子设备的便携式电子设备及其制造方法。 制造方法包括：在基板上形成光电转换区域; 在衬底中形成与衬底的光电转换区域间隔开的第一浮动扩散区域和与第一浮动扩散区域间隔开的第二浮动扩散区域; 通过从所述衬底的第一表面去除所述衬底的一部分，形成与所述第一浮动扩散区域和所述第二浮动扩散区域间隔开的第一凹部; 填充第一凹部以形成从衬底的第一表面垂直或基本垂直延伸的双转换增益（DCG）栅极; 以及形成导电层以填充所述第一凹部的内部。

公开(公告)号：US08356228B2

公开(公告)日：2013-01-15

申请号：US12681732

申请日：2008-10-02

申请人： Yong-Chan Kim ,  Il-Ho Lee

发明人： Yong-Chan Kim ,  Il-Ho Lee

IPC分类号： H03M13/00

CPC分类号： H04H20/426 ,  H04H40/27 ,  Y02D70/1242 ,  Y02D70/168

摘要： An apparatus and method for reducing power consumption in a mobile communication system are provided. The apparatus includes a time slicing processor. When a frame border of the last section for determining a burst reception end time is not detected during a burst reception operation, the time slicing processor receives a burst enough to restore the whole MPE-FEC frame to the former state or receives an early burst reception end request for notifying that it is impossible to restore the whole MPE-FEC frame to the former state, and terminates the burst reception process.

摘要翻译： 提供了一种用于降低移动通信系统中的功耗的装置和方法。 该装置包括时间分片处理器。 当在突发接收操作期间没有检测到用于确定突发接收结束时间的最后部分的帧边界时，时分片处理器接收到足以将整个MPE-FEC帧恢复到前一状态的突发或接收早期突发接收 通知不可能将整个MPE-FEC帧恢复到前一状态的结束请求，并且终止突发接收处理。

公开(公告)号：USD590366S1

公开(公告)日：2009-04-14

申请号：US29302828

申请日：2008-01-25

申请人： Yong-chan Kim

设计人： Yong-chan Kim

公开(公告)号：US06579774B2

公开(公告)日：2003-06-17

申请号：US10123423

申请日：2002-04-17

申请人： Yong Chan Kim

发明人： Yong Chan Kim

IPC分类号： H01L21331

CPC分类号： H01L29/66287

摘要： A semiconductor device fabrication method includes the steps of forming a first insulation layer and a first semiconductor layer sequentially on a semiconductor substrate having a buried diffusion region therein. A second insulation layer is formed on the first semiconductor layer. The first insulation layer, the first semiconductor layer, and the second insulation layer are then patterned to create openings that expose the buried diffusion region. A third insulation layer is formed on respective side walls of the openings on the exposed portions of the first semiconductor layer, first insulation layer and second insulation layer that form the openings. A first epitaxial layer is formed on the semiconductor substrate exposed through the openings. A second epitaxial layer is then formed on the first epitaxial layer to be connected to the first semiconductor layer, thereby forming an active base region and a second conductive type collector region in the second epitaxial layer of the first and second openings. A second semiconductor layer is then formed over the entire structure. Portions of the second semiconductor layer are oxidized using an oxidation mask, to form insulator portions. An emitter electrode, a base electrode and a collector electrode are formed on the portions of the second semiconductor layer that correspond to the emitter region, the base region and the collector region. The portions of the second semiconductor layer that are not oxidized form contact plugs that connect the first semiconductor layer and the electrodes.

公开(公告)号：US06504881B1

公开(公告)日：2003-01-07

申请号：US09260381

申请日：1999-03-02

申请人： Yong-Chan Kim

发明人： Yong-Chan Kim

IPC分类号： H03M1341

CPC分类号： H03M13/6502 ,  H03M13/41 ,  H03M13/4107 ,  H03M13/4169

摘要： The present invention relates to an integrated viterbi decoder with improved test function. The viterbi decoder recovers original symbol and data bits from convolutional binary symbol stream, reducing a noise and data loss originated from a channel fading. For enhancing the test function of the viterbi decoder, the viterbi decoder of the present invention stores predetermined test control signals in a test register. During a test, the test control signals are synchronized with a test clock apart from a frame synchronous signal of the viterbi decoder. The test time of the viterbi decoder, thus, is not restricted by the frame synchronous signal. As a result, the test time of the viterbi decoder can be reduced without addition of an external pin.

摘要翻译： 本发明涉及具有改进的测试功能的集成维特比解码器。 维特比解码器从卷积二进制符号流恢复原始符号和数据位，从而减少源自信道衰落的噪声和数据丢失。 为了提高维特比解码器的测试功能，本发明的维特比解码器将预定的测试控制信号存储在测试寄存器中。 在测试期间，测试控制信号与除维特比解码器的帧同步信号之外的测试时钟同步。 因此，维特比解码器的测试时间不受帧同步信号的限制。 因此，可以减少维特比解码器的测试时间，而不需要增加外部引脚。

公开(公告)号：US06246084B1

公开(公告)日：2001-06-12

申请号：US09188408

申请日：1998-11-10

申请人： Yong Chan Kim

发明人： Yong Chan Kim

IPC分类号： H01L27108

CPC分类号： H01L27/0629 ,  H01L28/20 ,  H01L28/40

摘要： A semiconductor device is disclosed, in which a capacitor lower electrode is formed of doped polysilicon and a capacitor upper electrode is formed of metal material to improve voltage coefficient characteristic. The semiconductor device includes a semiconductor substrate in which an active region and a field region are defined, a gate electrode and source and drain regions formed in the active region of the semiconductor substrate, a field oxide film formed in the field region of the semiconductor substrate, a capacitor lower electrode and a resistor formed of a doped polysilicon on the field oxide film, a capacitor dielectric film formed in a predetermined region on the capacitor lower electrode, and a capacitor upper electrode formed of metal material on the capacitor dielectric film.

摘要翻译： 公开了一种半导体器件，其中电容器下电极由掺杂多晶硅形成，并且电容器上电极由金属材料形成以改善电压系数特性。 半导体器件包括其中限定有源区和场区的半导体衬底，形成在半导体衬底的有源区中的栅电极和源极和漏极区，形成在半导体衬底的场区中的场氧化膜 电容器下电极和由场氧化物膜上的掺杂多晶硅形成的电阻器，形成在电容器下电极上的预定区域中的电容器电介质膜和在电容器电介质膜上由金属材料形成的电容器上电极。

公开(公告)号：US6060365A

公开(公告)日：2000-05-09

申请号：US17486

申请日：1998-02-02

申请人： Yong-Chan Kim

发明人： Yong-Chan Kim

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L27/082 ,  H01L29/732

CPC分类号： H01L29/66287

摘要： A method for fabricating a bipolar transistor improves the fast characteristics of the transistor at low operating voltages. An oxide film is formed on a semiconductor substrate, in which a buried layer is formed, and a floating poly base is formed on the oxide film. An insulating film is then formed on the entire surface of the semiconductor substrate including the floating poly base. The insulating film and the floating poly base are etched to define a base region and a collector region, and a first epitaxial layer is formed in the base and collector regions, with the first epitaxial layer having a smaller thickness than the oxide film. A second epitaxial layer is formed on the first epitaxial layer, and impurities are implanted into the second epitaxial layer in the base and collector regions. A second polysilicon layer is then formed on the second epitaxial layer in the base region, and electrodes are formed on the semiconductor surface.

摘要翻译： 制造双极晶体管的方法改善了在低工作电压下晶体管的快速特性。 在形成有掩埋层的半导体基板上形成氧化膜，在氧化膜上形成浮置的多晶硅基底。 然后在包括浮动聚碱的半导体衬底的整个表面上形成绝缘膜。 蚀刻绝缘膜和浮动多晶硅基底以限定基极区域和集电极区域，并且在基极和集电极区域中形成第一外延层，其中第一外延层具有比氧化膜更薄的厚度。 在第一外延层上形成第二外延层，并且在基极和集电极区域中的第二外延层中注入杂质。 然后在基极区域的第二外延层上形成第二多晶硅层，并且在半导体表面上形成电极。

公开(公告)号：US5970355A

公开(公告)日：1999-10-19

申请号：US18476

申请日：1998-02-04

申请人： Yong Chan Kim

发明人： Yong Chan Kim

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8228 ,  H01L27/082 ,  H01L29/70 ,  H01L29/732

CPC分类号： H01L21/82285 ,  H01L27/0826

摘要： A method for fabricating a semiconductor device having a base electrode, an emitter electrode, and a collector electrode, includes the steps of: forming first, second, and buried layers in a semiconductor substrate; forming first, second, and third epitaxial layers using the respective buried layers as seeds; forming an isolation region between the first and second epitaxial layers; forming first, second, and third impurity regions connected to the respective buried layers through the respective epitaxial layers; forming fourth, fifth, and sixth impurity regions in the respective epitaxial layers; forming polysilicon layers on the respective epitaxial layers, respectively; defining first, second, and third emitter electrode regions as well as first, second, and third base contact regions; etching portions of the polysilicon layers excluding the emitter electrode regions and the base contact regions down to a predetermined depth; oxidizing the etched portions of the polysilicon layer to grow an oxide layer; implanting N-type impurity ions into the polysilicon layer of the first and second base contact regions and the third emitter electrode region, and P-type ions into the first and second emitter regions and the third base contact region; depositing a metal on the exposed surfaces; and patterning the metal to be in contact with the respective polysilicon layers.

摘要翻译： 一种制造具有基极，发射极和集电极的半导体器件的方法，包括以下步骤：在半导体衬底中形成第一，第二和埋层; 使用相应的埋层作为晶种形成第一，第二和第三外延层; 在所述第一和第二外延层之间形成隔离区; 形成通过各个外延层连接到相应掩埋层的第一，第二和第三杂质区; 在各个外延层中形成第四，第五和第六杂质区; 分别在各个外延层上形成多晶硅层; 限定第一，第二和第三发射极电极区域以及第一，第二和第三基极接触区域; 将除了发射极电极区域和基极接触区域之外的多晶硅层的部分蚀刻到预定深度; 氧化多晶硅层的蚀刻部分以生长氧化物层; 将N型杂质离子注入到第一和第二基极接触区域和第三发射极电极区域的多晶硅层中，并将P型离子注入到第一和第二发射极区域和第三基极接触区域中; 在暴露的表面上沉积金属; 以及将金属图案化成与各个多晶硅层接触。

公开(公告)号：US5862676A

公开(公告)日：1999-01-26

申请号：US879197

申请日：1997-06-19

申请人： Jong-Youb Kim ,  Young-Dawn Bae ,  Eun-Chang Choi ,  Yong-Chan Kim

发明人： Jong-Youb Kim ,  Young-Dawn Bae ,  Eun-Chang Choi ,  Yong-Chan Kim

IPC分类号： F25B41/06

CPC分类号： F25B41/06 ,  F25B2341/061 ,  F25B2500/01 ,  Y10T137/7847

摘要： A refrigerant expansion device for a refrigeration cycle comprises a housing, a passage formed penetrating the housing, an expansion means for expanding the refrigerant passing through the passage and a flow rate control means for bypassing some of the refrigerant passing through the expansion means according to the pressure of the refrigerant, for supplying to the low pressure portion of the passage, and for controlling the flow rate of the refrigerant through the expansion means.

摘要翻译： 一种用于制冷循环的制冷剂膨胀装置包括壳体，穿过壳体的通道，用于使通过通道的制冷剂膨胀的膨胀装置和用于使通过膨胀装置的一些制冷剂旁路的流量控制装置， 制冷剂的压力，用于向通道的低压部供给，并且用于控制通过膨胀装置的制冷剂的流量。

公开(公告)号：US20130157363A1

公开(公告)日：2013-06-20

申请号：US13716900

申请日：2012-12-17

申请人： Yong Chan Kim ,  Ethan Shevach

发明人： Yong Chan Kim ,  Ethan Shevach

IPC分类号： C12N5/0783

CPC分类号： C12N5/0637 ,  A61K35/17 ,  A61K2035/124 ,  C12N5/0636 ,  C12N2501/056 ,  C12N2501/515

摘要： The present invention provides methods for producing cell populations enriched for stable, regulatory T cells (Tregs). In particular, the invention relates to methods for culturing T cells such that the final culture is enriched for stable, regulatory T cells. It also relates to methods for stabilizing regulatory T cells. Also provided are compositions enriched for stable, regulatory T cells, which are useful for treating individuals in need of such treatment. The methods and compositions disclosed herein can also be used to treat an individual suffering from an immune-mediated disease.

摘要翻译： 本发明提供用于产生富含稳定的调节性T细胞（Treg）的细胞群的方法。 特别地，本发明涉及培养T细胞的方法，使得最终培养物富集稳定的调节性T细胞。 它还涉及用于稳定调节性T细胞的方法。 还提供了富含稳定的调节性T细胞的组合物，其可用于治疗需要这种治疗的个体。 本文公开的方法和组合物还可以用于治疗患有免疫介导的疾病的个体。