公开(公告)号：US10283436B2

公开(公告)日：2019-05-07

申请号：US15783193

申请日：2017-10-13

Applicant: ABB Schweiz AG

Inventor： Juergen Schuderer ,  Fabian Mohn ,  Didier Cottet ,  Felix Traub ,  Daniel Kearney

IPC: H01L23/473 ,  H01L25/07 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L29/16

Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.

公开(公告)号：US20190304946A1

公开(公告)日：2019-10-03

申请号：US16442923

申请日：2019-06-17

Applicant: ABB Schweiz AG ,  AUDI AG

Inventor： Didier Cottet ,  Felix Traub ,  Jürgen Schuderer ,  Andreas Apelsmeier ,  Johann Asam

IPC: H01L23/00 ,  H01L25/07 ,  H01L23/64

Abstract: A power semiconductor module, including a housing; a power semiconductor chip within the housing; power terminals protruding from the housing and electrically interconnected with power electrodes of the semiconductor chip; and auxiliary terminals protruding from the housing and electrically interconnected with a gate electrode and one of the power electrodes; wherein three auxiliary terminals are arranged in a coaxial auxiliary terminal arrangement, which comprises an inner and two outer auxiliary terminals, which are arranged on opposing sides of the inner auxiliary terminal. The inner auxiliary terminal is electrically interconnected with the gate electrode or one of the power electrodes and the two outer auxiliary terminals are electrically connected with the other one of the gate electrode and the one of the power electrodes.

公开(公告)号：US20180040538A1

公开(公告)日：2018-02-08

申请号：US15783193

申请日：2017-10-13

Applicant: ABB Schweiz AG

Inventor： Juergen Schuderer ,  Fabian Mohn ,  Didier Cottet ,  Felix Traub ,  Daniel Kearney

IPC: H01L23/473 ,  H01L23/498 ,  H01L23/31 ,  H01L29/16 ,  H01L25/07 ,  H01L23/00

CPC classification number: H01L23/473 ,  H01L23/3142 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/49 ,  H01L25/071 ,  H01L29/1608 ,  H01L2224/33 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.

公开(公告)号：US09899283B2

公开(公告)日：2018-02-20

申请号：US15599626

申请日：2017-05-19

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Didier Cottet ,  Felix Traub

IPC: H01L23/52 ,  H01L23/14 ,  H01L23/24 ,  H01L23/00

CPC classification number: H01L23/142 ,  H01L23/24 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0603 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/1304 ,  H01L2924/19107 ,  H01L2924/30107 ,  H02M7/003

Abstract: A power module providing a half bridge comprises at least one substrate and an inner metallization area, two intermediate metallization areas and two outer metallization areas, each of which extends in a longitudinal direction of the at least one substrate; wherein the two intermediate metallization areas are arranged besides the inner metallization area with respect to a cross direction of the at least one substrate and each outer metallization area is arranged beside one of the two intermediate metallization areas with respect to the cross direction; wherein the power module comprises two inner sets of semiconductor switches, each inner set of semiconductor switches bonded to an intermediate metallization area and electrically connected to the inner metallization area, such that the inner sets of semiconductor switches form a first arm of the half bridge; wherein the power module comprises two outer sets of semiconductor switches, each outer set of semiconductor switches bonded to an outer metallization area and electrically connected to an intermediate metallization area, such that the outer sets of semiconductor switches form a second arm of the half bridge.

公开(公告)号：US20180366400A1

公开(公告)日：2018-12-20

申请号：US16111984

申请日：2018-08-24

Applicant: ABB Schweiz AG

Inventor： Fabian Mohn ,  Juergen Schuderer ,  Felix Traub

IPC: H01L23/498 ,  H01L23/373 ,  H01L23/14 ,  H01L23/538 ,  H01L25/07 ,  H05K1/02 ,  H05K1/18 ,  H01L23/00

Abstract: A power module comprises at least one power semiconductor device with an electrical top contact area on a top side; and a multi-layer circuit board with multiple electrically conducting layers which are separated by multiple electrically isolating layers, the electrically isolating layers being laminated together with the electrically conducting layers; wherein the multi-layer circuit board has at least one cavity, which is opened to a top side of the multi-layer circuit board, which cavity reaches through at least two electrically conducting layers; wherein the power semiconductor device is attached with a bottom side to a bottom of the cavity; and wherein the power semiconductor device is electrically connected to a top side of the multi-layer circuit board with a conducting member bonded to the top contact area and bonded to the top side of the multi-layer circuit board.

公开(公告)号：US11018109B2

公开(公告)日：2021-05-25

申请号：US16442923

申请日：2019-06-17

Applicant: ABB Schweiz AG ,  AUDI AG

Inventor： Didier Cottet ,  Felix Traub ,  Jürgen Schuderer ,  Andreas Apelsmeier ,  Johann Asam

IPC: H01L23/64 ,  H01L23/49 ,  H01L23/00 ,  H01L25/07 ,  H01L23/498

Abstract: A power semiconductor module, including a housing; a power semiconductor chip within the housing; power terminals protruding from the housing and electrically interconnected with power electrodes of the semiconductor chip; and auxiliary terminals protruding from the housing and electrically interconnected with a gate electrode and one of the power electrodes; wherein three auxiliary terminals are arranged in a coaxial auxiliary terminal arrangement, which comprises an inner and two outer auxiliary terminals, which are arranged on opposing sides of the inner auxiliary terminal. The inner auxiliary terminal is electrically interconnected with the gate electrode or one of the power electrodes and the two outer auxiliary terminals are electrically connected with the other one of the gate electrode and the one of the power electrodes.

公开(公告)号：US20200066686A1

公开(公告)日：2020-02-27

申请号：US16673427

申请日：2019-11-04

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Fabian Mohn ,  Felix Traub ,  Jürgen Schuderer

IPC: H01L25/07 ,  H01L23/498 ,  H01L23/538 ,  H02M7/00 ,  H05K7/14 ,  H01L23/00

Abstract: A half-bridge module includes a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; and a coaxial terminal arrangement including at least one inner DC terminal, the at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal; wherein the at least one inner DC terminal is electrically connected to the second DC conducting area; the at least one first outer DC terminal and the at least one second outer DC terminal are electrically connected to the first DC conducting area; and the at least one first outer DC terminal and the at least one second outer DC terminal are electrically interconnected with an electrically conducting bridging element which is adapted for distributing at least a half of the load current between the at least one first outer DC terminal and the at least one second outer DC terminal.

公开(公告)号：US10283454B2

公开(公告)日：2019-05-07

申请号：US15819693

申请日：2017-11-21

Applicant: ABB Schweiz AG

Inventor： Felix Traub ,  Fabian Mohn ,  Juergen Schuderer ,  Daniel Kearney ,  Slavo Kicin

IPC: H01L23/538 ,  H01L23/64 ,  H01L25/07 ,  H01L29/00 ,  H01L23/373 ,  H01L23/498

Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.

公开(公告)号：US20180090441A1

公开(公告)日：2018-03-29

申请号：US15819693

申请日：2017-11-21

Applicant: ABB Schweiz AG

Inventor： Felix Traub ,  Fabian Mohn ,  Juergen Schuderer ,  Daniel Kearney ,  Slavo Kicin

IPC: H01L23/538 ,  H01L23/64 ,  H01L25/07 ,  H01L29/00

CPC classification number: H01L23/5385 ,  H01L23/3735 ,  H01L23/49811 ,  H01L23/645 ,  H01L25/072 ,  H01L29/00 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49111 ,  H01L2924/19107 ,  H01L2924/00014

Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.

公开(公告)号：US20170338162A1

公开(公告)日：2017-11-23

申请号：US15599626

申请日：2017-05-19

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Didier Cottet ,  Felix Traub

IPC: H01L23/14 ,  H01L23/24 ,  H01L23/00

CPC classification number: H01L23/142 ,  H01L23/24 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0603 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/1304 ,  H01L2924/19107 ,  H01L2924/30107 ,  H02M7/003

Abstract: A power module providing a half bridge comprises at least one substrate and an inner metallization area, two intermediate metallization areas and two outer metallization areas, each of which extends in a longitudinal direction of the at least one substrate; wherein the two intermediate metallization areas are arranged besides the inner metallization area with respect to a cross direction of the at least one substrate and each outer metallization area is arranged beside one of the two intermediate metallization areas with respect to the cross direction; wherein the power module comprises two inner sets of semiconductor switches, each inner set of semiconductor switches bonded to an intermediate metallization area and electrically connected to the inner metallization area, such that the inner sets of semiconductor switches form a first arm of the half bridge; wherein the power module comprises two outer sets of semiconductor switches, each outer set of semiconductor switches bonded to an outer metallization area and electrically connected to an intermediate metallization area, such that the outer sets of semiconductor switches form a second arm of the half bridge.