公开(公告)号：US20220317757A1

公开(公告)日：2022-10-06

申请号：US17219097

申请日：2021-03-31

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Karthik RAO ,  Indrani PAUL ,  Donny YI ,  Oleksandr KHODORKOVSKY ,  Leonardo DE PAULA ROSA PIGA ,  Wonje CHOI ,  Dana G. LEWIS ,  Sriram SAMBAMURTHY

IPC: G06F1/3287 ,  G06N5/04

Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.

公开(公告)号：US20230088994A1

公开(公告)日：2023-03-23

申请号：US17993562

申请日：2022-11-23

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Karthik RAO ,  Indrani Paul ,  Donny YI ,  Oleksandr KHODORKOVSKY ,  Leonardo DE PAULA ROSA PIGA ,  Wonje CHOI ,  Dana G. LEWIS ,  Sriram SAMBAMURTHY

IPC: G06F1/3287

Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.

公开(公告)号：US20210406092A1

公开(公告)日：2021-12-30

申请号：US16945519

申请日：2020-07-31

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Leonardo DE PAULA ROSA PIGA ,  Karthik RAO ,  Indrani PAUL ,  Mahesh SUBRAMONY ,  Kenneth MITCHELL ,  Dana Glenn LEWIS ,  Sriram SAMBAMURTHY ,  Wonje CHOI

IPC: G06F9/50 ,  G06F9/48 ,  G06F9/30

Abstract: A processing unit of a processing system compiles a priority queue listing of a plurality of processor cores to run a workload based on a cost of running the workload on each of the processor cores. The cost is based on at least one of a system usage policy, characteristics of the workload, and one or more physical constraints of each processor core. The processing unit selects a processor core based on the cost to run the workload and communicates an identifier of the selected processor core to an operating system of the processing system.

公开(公告)号：US20200042197A1

公开(公告)日：2020-02-06

申请号：US16052055

申请日：2018-08-01

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Jagadish B. KOTRA ,  Karthik RAO ,  Joseph L. GREATHOUSE

IPC: G06F3/06

Abstract: A system including a stack of two or more layers of volatile memory, such as layers of a 3D stacked DRAM memory, places data in the stack based on a temperature or a refresh rate. When a threshold is exceeded, data are moved from a first region to a second region in the stack, the second region having one or both of a second temperature lower than a first temperature of the first region or a second refresh rate lower than a first refresh rate of the first region.

公开(公告)号：US20210191770A1

公开(公告)日：2021-06-24

申请号：US16718896

申请日：2019-12-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Karthik RAO ,  Shomit N. DAS ,  Manish ARORA

IPC: G06F9/48 ,  G06F9/38 ,  G06F1/324 ,  G06F1/20

Abstract: A processing unit preemptively cools selected compute units prior to initiating execution of a wavefront at the selected compute units. A scheduler of the processing unit identifies that a wavefront is to be executed at a selected subset of compute units of the processing unit. In response, the processing unit's temperature control subsystem activates one or more cooling elements to reduce the temperature of the subset of compute units, prior to the scheduler initiating execution of the wavefront. By preemptively cooling the compute units, the temperature control subsystem increases the difference between the initial temperature of the compute units and a thermal throttling threshold that triggers performance-impacting temperature control measures, such as the reduction of a compute unit clock frequency.

公开(公告)号：US20210034256A1

公开(公告)日：2021-02-04

申请号：US16939814

申请日：2020-07-27

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Jagadish B. KOTRA ,  Karthik RAO ,  Joseph L. GREATHOUSE

IPC: G06F3/06

Abstract: A system including a stack of two or more layers of volatile memory, such as layers of a 3D stacked DRAM memory, places data in the stack based on a temperature or a refresh rate. When a threshold is exceeded, data are moved from a first region to a second region in the stack, the second region having one or both of a second temperature lower than a first temperature of the first region or a second refresh rate lower than a first refresh rate of the first region.