公开(公告)号：US20200243387A1

公开(公告)日：2020-07-30

申请号：US16754323

申请日：2018-10-11

Applicant: ams AG

Inventor： Thomas BODNER ,  Stefan JESSENIG ,  Franz SCHRANK

IPC: H01L21/768 ,  H01L23/48 ,  H01L21/56

Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor body with a main plane of extension, and forming a trench in the semiconductor body from a top side of the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body. The method further comprises the steps of coating inner walls of the trench with an isolation layer, depositing a metallization layer within the trench, and depositing a passivation layer within the trench such that an inner volume of the trench is free of any material, wherein inner surfaces that are adjacent to the inner volume are treated to be hydrophobic at least in places. Furthermore, a semiconductor device is provided.

公开(公告)号：US20220328380A1

公开(公告)日：2022-10-13

申请号：US17639736

申请日：2020-08-27

Applicant: ams AG

Inventor： Georg PARTEDER ,  Jochen KRAFT ,  Stefan JESSENIG

IPC: H01L23/48 ,  H01L21/768

Abstract: An open through-substrate via, TSV, comprises an insulation layer disposed adjacent to at least a portion of side walls of a trench and to a surface of a substrate body. The TSV further comprises a metallization layer disposed adjacent to at least a portion of the insulation layer and to at least a portion of a bottom wall of said trench, a redistribution layer disposed adjacent to at least a portion of the metallization layer and a portion of the insulation layer disposed adjacent to the surface, and a capping layer disposed adjacent to at least a portion of the metallization layer and to at least a portion of the redistribution layer. The insulation layer and/or the capping layer comprise sublayers that are distinct from each other in terms of material properties. A first of the sublayers is disposed adjacent to at least a portion of the side walls and to at least a portion of the surface and a second of the sublayers is disposed adjacent to at least a portion of the surface.

公开(公告)号：US20160035929A1

公开(公告)日：2016-02-04

申请号：US14777484

申请日：2014-03-11

Applicant: AMS AG

Inventor： Jordi TEVA ,  Frederic ROGER ,  Ewald STUECKLER ,  Stefan JESSENIG ,  Rainer MINIXHOFER ,  Ewald WACHMANN ,  Martin SCHREMS ,  Guenther KOPPITSCH

IPC: H01L31/107 ,  H01L31/18 ,  H01L31/0368 ,  H01L31/0224 ,  H01L31/0352

CPC classification number: H01L31/107 ,  H01L31/022408 ,  H01L31/03529 ,  H01L31/03682 ,  H01L31/182 ,  Y02E10/50

Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.

Abstract translation: 横向单光子雪崩二极管包括半导体本体，其包括第一导电类型的半导体材料，半导体主体中的沟槽以及阳极和阴极端子。 第一类电导率的结区域位于沟槽的侧壁附近，并且在结区域中的电导率高于距离侧壁更远的距离。 相邻的第二导电类型的半导体层被布置在与结区相邻的沟槽的侧壁处。 阳极和阴极端子分别与半导体层和结区域电连接。 接合区域可以通过侧壁注入形成。