公开(公告)号：US20160259139A1

公开(公告)日：2016-09-08

申请号：US15028934

申请日：2014-10-08

Applicant: AMS AG

Inventor： Jochen KRAFT ,  Karl ROHRACHER ,  Jordi TEVA

IPC: G02B6/42 ,  G02B6/13 ,  G02B6/12 ,  H01L23/48 ,  H01L31/16

CPC classification number: G02B6/4283 ,  G02B6/12002 ,  G02B6/13 ,  G02B6/4274 ,  G02B6/428 ,  G02B6/43 ,  G02B2006/121 ,  G02B2006/12107 ,  G02B2006/12121 ,  G02B2006/12123 ,  G02B2006/12147 ,  H01L23/481 ,  H01L23/522 ,  H01L31/16 ,  H01L2224/16225 ,  H05K1/0274 ,  H05K1/115 ,  H05K1/116 ,  H05K1/181 ,  H05K3/429 ,  H05K3/4605 ,  H05K2201/0939 ,  H05K2201/09518 ,  H05K2201/09581 ,  H05K2201/10174

Abstract: The method comprises providing a semiconductor substrate, which has a main surface and an opposite further main surface, arranging a contact pad above the further main surface, forming a through-substrate via from the main surface to the further main surface at a distance from the contact pad and, by the same method step together with the through-substrate via, forming a further through-substrate via above the contact pad, arranging a hollow metal via layer in the through-substrate via and, by the same method step together with the metal via layer, arranging a further metal via layer in the further through-substrate via, the further metal via layer contacting the contact pad, and removing a bottom portion of the metal via layer to form an optical via laterally surrounded by the metal via layer.

Abstract translation: 该方法包括提供半导体衬底，其具有主表面和相对的另一个主表面，将接触焊盘布置在另一个主表面上方，从而从主表面到另一个主表面在距离 接触焊盘，并且通过与通孔基板通孔相同的方法步骤，在接触焊盘上方形成另外的通孔，在穿通基板中经由中空金属通孔层，并且通过相同的方法步骤连同 金属通孔层，在另外的通孔中经由另外的金属通孔层，通过另外的金属通孔层与接触垫接触，以及去除金属通孔层的底部，以形成由金属通孔横向包围的光学通孔 层。

公开(公告)号：US20160035929A1

公开(公告)日：2016-02-04

申请号：US14777484

申请日：2014-03-11

Applicant: AMS AG

Inventor： Jordi TEVA ,  Frederic ROGER ,  Ewald STUECKLER ,  Stefan JESSENIG ,  Rainer MINIXHOFER ,  Ewald WACHMANN ,  Martin SCHREMS ,  Guenther KOPPITSCH

IPC: H01L31/107 ,  H01L31/18 ,  H01L31/0368 ,  H01L31/0224 ,  H01L31/0352

CPC classification number: H01L31/107 ,  H01L31/022408 ,  H01L31/03529 ,  H01L31/03682 ,  H01L31/182 ,  Y02E10/50

Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.

Abstract translation: 横向单光子雪崩二极管包括半导体本体，其包括第一导电类型的半导体材料，半导体主体中的沟槽以及阳极和阴极端子。 第一类电导率的结区域位于沟槽的侧壁附近，并且在结区域中的电导率高于距离侧壁更远的距离。 相邻的第二导电类型的半导体层被布置在与结区相邻的沟槽的侧壁处。 阳极和阴极端子分别与半导体层和结区域电连接。 接合区域可以通过侧壁注入形成。

公开(公告)号：US20150380308A1

公开(公告)日：2015-12-31

申请号：US14766412

申请日：2014-01-29

Applicant: AMS AG

Inventor： Guenther KOPPITSCH ,  Ewald STUECKLER ,  Karl ROHRACHER ,  Jordi TEVA

IPC: H01L21/768 ,  H01L21/033

CPC classification number: H01L21/76882 ,  G03F7/094 ,  H01L21/0335 ,  H01L21/7685 ,  H01L21/76883 ,  H01L21/76898

Abstract: The method comprises the steps of providing a semiconductor body or substrate (1) with a recess or trench (2) in a main surface (10), applying a mask (3) on the main surface, the mask covering the recess or trench, so that the walls and bottom of the recess or trench and the mask together enclose a cavity (4), which is filled with a gas, and forming at least one opening (5) in the mask at a distance from the recess or trench, the distance (6) being adapted to allow the gas to escape from the cavity via the opening when the gas pressure exceeds an external pressure.

Abstract translation: 该方法包括以下步骤：在主表面（10）中提供具有凹槽或沟槽（2）的半导体本体或衬底（1），在主表面上施加掩模（3），覆盖凹部或沟槽的掩模， 使得凹部或沟槽和面罩的壁和底部一起包围填充有气体的空腔（4），并且在距离凹部或沟槽一定距离处的掩模中形成至少一个开口（5） 所述距离（6）适于当所述气体压力超过外部压力时允许所述气体经由所述开口从所述空腔逸出。

公开(公告)号：US20150333210A1

公开(公告)日：2015-11-19

申请号：US14654470

申请日：2013-12-19

Applicant: AMS AG

Inventor： Jordi TEVA ,  Frederic ROGER

IPC: H01L31/107 ,  H01L31/02 ,  H01L31/18 ,  H01L31/0368 ,  H01L31/0248 ,  H01L31/0224

CPC classification number: H01L31/022408 ,  H01L31/02005 ,  H01L31/0224 ,  H01L31/022416 ,  H01L31/0248 ,  H01L31/03529 ,  H01L31/03682 ,  H01L31/107 ,  H01L31/182 ,  Y02E10/50

Abstract: A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon.

Abstract translation: 形成第一导电类型的半导体本体，其包括基底层，基底层上的第一另外的层和第一另外的层上的第二另外的层。 基底层和第二另外的层具有低于第一另外的层的掺杂浓度的本征掺杂或掺杂浓度。 在半导体本体中布置相对的第二导电类型的掺杂区域，穿透第一另外的层并且延伸到基底层并进入第二另外的层。 阳极和阴极端子分别电连接到第一另外的层和掺杂区域。 可以通过用掺杂多晶硅填充沟槽来产生掺杂区域。