公开(公告)号：US20240203734A1

公开(公告)日：2024-06-20

申请号：US18540329

申请日：2023-12-14

Applicant: ASM IP Holding B.V.

Inventor： Maritza Mujica ,  Ernesto Suarez ,  Amir Kajbafvala ,  Rami Khazaka ,  Arum Murali ,  Frederick Aryeetey ,  Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos ,  Bibek Karki

IPC: H01L21/02 ,  C30B25/10 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L29/78

CPC classification number: H01L21/0262 ,  C30B25/10 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L21/02532 ,  H01L21/02579 ,  H01L29/7848 ,  H01L29/167

Abstract: Methods for forming multilayer structures are disclosed. The methods may include, seating a substrate within a chamber body, and regulating a temperature profile across an upper surface of the substrate during each individual deposition phase of multiphase deposition process. Semiconductor device structures including multilayer structures are also disclosed.

公开(公告)号：US20230324227A1

公开(公告)日：2023-10-12

申请号：US18190696

申请日：2023-03-27

Applicant: ASM IP Holding, B.V.

Inventor： Ernesto Suarez ,  Amir Kajbafvala ,  Caleb Miskin ,  Bubesh Babu Jotheeswaran ,  Alexandros Demos

IPC: C23C16/52 ,  H01L21/67 ,  C23C16/44 ,  G01J5/00

CPC classification number: G01J5/0007 ,  C23C16/4407 ,  C23C16/52 ,  H01L21/67115 ,  H01L21/67248

Abstract: A method of depositing an epitaxial material layer using pyrometer-based control. The method includes cleaning a reaction chamber of a reactor system, and, after the cleaning, providing a substrate within the reaction chamber. The method includes stabilizing a temperature of the substrate relative to a target deposition temperature. During stabilization, the heater assembly is operated with control signals to operate heaters in the heater assembly that are generated based on a direct measurement of the temperature of the substrate, such as with one to three pyrometers. The method includes, after the stabilizing of the temperature of the substrate, depositing an epitaxial material layer on a surface of the substrate. Then, for an additional number of substrates, the method involves repeating the steps of providing a substrate within the reaction chamber, stabilizing the temperature of the substrate, and depositing an epitaxial material layer on the substrate followed by another chamber cleaning.

公开(公告)号：US20250079167A1

公开(公告)日：2025-03-06

申请号：US18815636

申请日：2024-08-26

Applicant: ASM IP Holding B.V.

Inventor： Ernesto Suarez ,  Amir Kajbafvala ,  Arun Murali ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L29/167

Abstract: A method of forming a semiconductor structure includes seating a substrate on a substrate support arranged within a chamber arrangement of a semiconductor processing system, flowing a boron-containing precursor to the chamber arrangement at a first boron-containing precursor mass flow rate, and depositing a first portion of a first SiGe:B layer using the boron-containing precursor. Mass flow rate of the boron-containing precursor to an intermediate boron-containing precursor flow rate, a second portion of the first SiGe:B layer is deposited using the boron-containing precursor, mass flow rate of the boron-containing precursor to the chamber arrangement is further increased to a second boron-containing precursor mass flow rate, and a second SiGe:B layer is deposited onto the first SiGe:B layer using the boron-containing precursor, the increase in the mass flow rate of the boron-containing precursor to the intermediate boron-containing precursor mass flow rate limits boron concentration at a first SiGe:B layer-to-second SiGe:B layer interface defined between the first SiGe:B layer and the second SiGe:B layer to less than a boron concentration within the second SiGe:B layer. Semiconductor processing systems and related computer program products are also provided.

公开(公告)号：US20240404825A1

公开(公告)日：2024-12-05

申请号：US18676760

申请日：2024-05-29

Applicant: ASM IP Holding B.V.

Inventor： Ernesto Suarez

IPC: H01L21/02 ,  C23C16/52

Abstract: A method of making a semiconductor structure includes seating a substrate within a chamber arrangement, depositing a boron-doped silicon germanium layer onto the substrate, and depositing a boron-doped silicon layer onto the boron-doped silicon germanium layer. Deposition of the boron-doped silicon layer includes ceasing flow of a boron-containing precursor to the chamber arrangement; decreasing flow of a germanium-containing precursor to the chamber arrangement; increasing flow of a silicon-containing precursor to the chamber arrangement; ceasing, after increasing flow of the silicon-containing precursor, flow of the germanium-containing precursor to the chamber arrangement; and resuming flow of the boron-containing precursor to the chamber arrangement. Semiconductor structures as well as semiconductor processing systems and computer program products for making semiconductor structures are also described.