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公开(公告)号:US20200321209A1
公开(公告)日:2020-10-08
申请号:US16904166
申请日:2020-06-17
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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公开(公告)号:US10720322B2
公开(公告)日:2020-07-21
申请号:US16167225
申请日:2018-10-22
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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公开(公告)号:US11530483B2
公开(公告)日:2022-12-20
申请号:US16445096
申请日:2019-06-18
Applicant: ASM IP Holding B.V.
Inventor: YoonKi Min , YoungHoon Kim , HakJoo Lee , SeungJu Chun
IPC: C23C16/46 , H01L21/677 , C23C16/52 , H01L21/67
Abstract: Provided is a substrate processing system for improving productivity of processes. In this regard, the substrate processing system includes: a first chamber providing a space where at least one substrate is accommodated; a second chamber configured to transfer at least one substrate to the first chamber; and a temperature control unit configured to change a temperature of a gas in the second chamber.
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4.
公开(公告)号:US20170250068A1
公开(公告)日:2017-08-31
申请号:US15592730
申请日:2017-05-11
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
CPC classification number: H01L21/0217 , H01J2237/3347 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/0234 , H01L21/31111
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.
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公开(公告)号:US11676812B2
公开(公告)日:2023-06-13
申请号:US16904166
申请日:2020-06-17
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/311 , H01L21/02
CPC classification number: H01L21/0217 , H01L21/0228 , H01L21/0234 , H01L21/02211 , H01L21/02274 , H01L21/31111 , H01J2237/3347
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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公开(公告)号:US20190057857A1
公开(公告)日:2019-02-21
申请号:US16167225
申请日:2018-10-22
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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7.
公开(公告)号:US10529554B2
公开(公告)日:2020-01-07
申请号:US15592730
申请日:2017-05-11
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/306 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.
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公开(公告)号:US20190390343A1
公开(公告)日:2019-12-26
申请号:US16445096
申请日:2019-06-18
Applicant: ASM IP Holding B.V.
Inventor: YoonKi Min , YoungHoon Kim , HakJoo Lee , SeungJu Chun
IPC: C23C16/46 , H01L21/67 , C23C16/52 , H01L21/677
Abstract: Provided is a substrate processing system for improving productivity of processes. In this regard, the substrate processing system includes: a first chamber providing a space where at least one substrate is accommodated; a second chamber configured to transfer at least one substrate to the first chamber; and a temperature control unit configured to change a temperature of a gas in the second chamber.
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