公开(公告)号：US10720322B2

公开(公告)日：2020-07-21

申请号：US16167225

申请日：2018-10-22

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC: H01L21/02 ,  H01L21/311

Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.

公开(公告)号：US10580645B2

公开(公告)日：2020-03-03

申请号：US15966717

申请日：2018-04-30

Applicant: ASM IP HOLDING B.V.

Inventor： Shinya Ueda ,  Taishi Ebisudani ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/455 ,  C23C16/04

Abstract: Methods for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. One or more silicon nitride deposition cycle comprise a sequential plasma pretreatment phase in which the substrate is sequentially exposed to a hydrogen plasma and then to a nitrogen plasma in the absence of hydrogen plasma, and a deposition phase in which the substrate is exposed to a silicon precursor. In some embodiments a silicon hydrohalide precursors is used for depositing the silicon nitride. The silicon nitride films may have a high side-wall conformality and in some embodiments the silicon nitride film may be thicker at the bottom of the sidewall than at the top of the sidewall in a trench structure. In gap fill processes, the silicon nitride deposition processes can reduce or eliminate voids and seams.

公开(公告)号：US20190333753A1

公开(公告)日：2019-10-31

申请号：US15966717

申请日：2018-04-30

Applicant: ASM IP HOLDING B.V.

Inventor： Shinya Ueda ,  Taishi Ebisudani ,  Toshiya Suzuki

IPC: H01L21/02

Abstract: Methods for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. One or more silicon nitride deposition cycle comprise a sequential plasma pretreatment phase in which the substrate is sequentially exposed to a hydrogen plasma and then to a nitrogen plasma in the absence of hydrogen plasma, and a deposition phase in which the substrate is exposed to a silicon precursor. In some embodiments a silicon hydrohalide precursors is used for depositing the silicon nitride. The silicon nitride films may have a high side-wall conformality and in some embodiments the silicon nitride film may be thicker at the bottom of the sidewall than at the top of the sidewall in a trench structure. In gap fill processes, the silicon nitride deposition processes can reduce or eliminate voids and seams.

公开(公告)号：US10381219B1

公开(公告)日：2019-08-13

申请号：US16171098

申请日：2018-10-25

Applicant: ASM IP Holding B.V.

Inventor： Shinya Ueda ,  Tomomi Takayama ,  Taishi Ebisudani ,  Toshiya Suzuki ,  Tomohiro Kubota

IPC: C23C16/34 ,  H01L21/02 ,  C23C16/455

Abstract: Methods for forming a silicon nitride film by a plasma enhanced atomic layer deposition (PEALD) process are provided. The methods may include: providing a substrate into a reaction chamber; and performing at least one unit deposition cycle of a PEALD process, wherein a unit cycle comprises, contacting the substrate with a vapor phase reactant comprising a silicon precursor; and contacting the substrate with a reactive species generated from a gas mixture comprising a nitrogen precursor and an additional gas. Methods for improving the etch characteristics of a silicon nitride film utilizing a post deposition plasma treatment are also provided.

公开(公告)号：US11355338B2

公开(公告)日：2022-06-07

申请号：US16867385

申请日：2020-05-05

Applicant: ASM IP Holding B.V.

Inventor： Shinya Ueda

IPC: H01L21/02 ,  C23C14/00 ,  H01J37/32 ,  C23C16/455

Abstract: Methods of depositing material on a surface of a substrate are disclosed. The methods include exposing a surface of the substrate to a precursor within a reaction chamber to form adsorbed species on the surface and removing at least a portion of the adsorbed species prior to introducing a reactant to the reaction chamber.

公开(公告)号：US20220005693A1

公开(公告)日：2022-01-06

申请号：US17360972

申请日：2021-06-28

Applicant: ASM IP Holding B.V.

Inventor： Takashi Mizoguchi ,  Eiichiro Shiba ,  Shinya Ueda ,  Sunja Kim

IPC: H01L21/033 ,  H01L21/02 ,  H01J37/32 ,  C23C16/50 ,  C23C16/40 ,  C23C16/34 ,  C23C16/52 ,  C23C16/455

Abstract: Methods of depositing material on a surface of a substrate are disclosed. The methods include using a fluorine reactant to reduce a growth rate per cycle of silicon oxide and/or silicon nitride deposited onto a surface of a substrate.

公开(公告)号：US20170250068A1

公开(公告)日：2017-08-31

申请号：US15592730

申请日：2017-05-11

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC: H01L21/02 ,  H01L21/311

CPC classification number: H01L21/0217 ,  H01J2237/3347 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/31111

Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.

公开(公告)号：US11676812B2

公开(公告)日：2023-06-13

申请号：US16904166

申请日：2020-06-17

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/0217 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31111 ,  H01J2237/3347

Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.

公开(公告)号：US20230142899A1

公开(公告)日：2023-05-11

申请号：US17979237

申请日：2022-11-02

Applicant: ASM IP Holding B.V.

Inventor： Shinya Ueda ,  SeokJae Oh ,  HyunGyu Jang ,  HeeSung Kang ,  WanGyu Lim ,  HyounMo Choi ,  YoungJae Kim

IPC: C23C16/505 ,  H01J37/32 ,  C23C16/34 ,  C23C16/52 ,  C23C16/455

CPC classification number: C23C16/505 ,  H01J37/32743 ,  H01J37/32449 ,  C23C16/345 ,  C23C16/52 ,  C23C16/45536 ,  H01J2237/3321

Abstract: A method and system for forming a film on a substrate are disclosed. Exemplary methods include using a first plasma condition to form a layer of deposited material having a good film thickness uniformity, using a second plasma condition to treat the deposited material and thereby form treated material, and using a third plasma condition to form a surface-modified layer—e.g., reactive sites on the treated material.

公开(公告)号：US20220415650A1

公开(公告)日：2022-12-29

申请号：US17847531

申请日：2022-06-23

Applicant: ASM IP Holding B.V.

Inventor： JaeOk Ko ,  HeeSung Kang ,  JaeBin Ahn ,  SeokJae Oh ,  WanGyu Lim ,  HyounMo Choi ,  YoungJae Kim ,  Shinya Ueda

IPC: H01L21/02 ,  C23C16/455 ,  H01J37/32 ,  C23C16/02 ,  C23C16/505 ,  C23C16/04

Abstract: Provided is a substrate processing method capable of filling a film in a gap structure without forming voids or seams in a gap, the substrate processing method including: a first step of forming a thin film on a structure including a gap by performing a first cycle including supplying a first reaction gas and supplying a second reaction gas to the structure a plurality of times; a second step of etching a portion of the thin film by supplying a fluorine-containing gas onto the thin film; a third step of supplying a hydrogen-containing gas onto the thin film; a fourth step of supplying an inhibiting gas to an upper portion of the gap; and a fifth step of forming a thin film by performing a second cycle including supplying the first reaction gas and supplying a second reaction gas onto the thin film a plurality of times.