公开(公告)号：US20190189818A1

公开(公告)日：2019-06-20

申请号：US15843136

申请日：2017-12-15

申请人： Atomera Incorporated

发明人： YI-ANN CHEN ,  Abid Husain ,  Hideki Takeuchi

IPC分类号： H01L31/0352 ,  H01L27/146 ,  H01L31/109 ,  H01L31/18

CPC分类号： H01L31/035254 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14692 ,  H01L31/109 ,  H01L31/1804

摘要： A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a plurality of laterally adjacent photodiodes formed in the substrate. Each photodiode may include a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the second conductivity type, and a second well within the retrograde well having the first conductivity type. Each photodiode may further include first and second superlattices respectively overlying each of the first and second wells. Each of the first and second superlattices may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

公开(公告)号：US20190189665A1

公开(公告)日：2019-06-20

申请号：US15843017

申请日：2017-12-15

申请人： ATOMERA INCORPORATED

发明人： YI-ANN CHEN ,  ABID HUSAIN ,  HIDEKI TAKEUCHI

IPC分类号： H01L27/146 ,  H01L29/15 ,  H01L29/10 ,  H01L29/16

CPC分类号： H01L27/14634 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689 ,  H01L27/1469 ,  H01L29/1033 ,  H01L29/152 ,  H01L29/16

摘要： A CMOS image sensor may include a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, and a second semiconductor chip coupled to the first semiconductor chip in a stack and including image processing circuitry electrically connected to the readout circuitry. The readout circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

公开(公告)号：US20190189657A1

公开(公告)日：2019-06-20

申请号：US15842981

申请日：2017-12-15

申请人： ATOMERA INCORPORATED

发明人： YI-ANN CHEN ,  ABID HUSAIN ,  HIDEKI TAKEUCHI

IPC分类号： H01L27/146

CPC分类号： H01L27/14616 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14689 ,  H01L27/1469 ,  H01L29/152

摘要： A method for making a CMOS image sensor may include forming a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, forming a second semiconductor chip including image processing circuitry electrically connected to the readout circuitry, and coupling the first semiconductor chip and the second semiconductor chip in a stack. The processing circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

公开(公告)号：US20190189652A1

公开(公告)日：2019-06-20

申请号：US15843106

申请日：2017-12-15

申请人： Atomera Incorporated

发明人： YI-ANN CHEN ,  Abid Husain ,  Hideki Takeuchi

IPC分类号： H01L27/146 ,  H01L31/0352

CPC分类号： H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/035236

摘要： A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a superlattice on the semiconductor substrate including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The image sensor may further include a plurality of laterally adjacent photodiodes on the superlattice. Each photodiode may include a semiconductor layer on the superlattice and having a first conductivity type dopant and with a lower dopant concentration than the semiconductor substrate, a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.

公开(公告)号：US20240072096A1

公开(公告)日：2024-02-29

申请号：US18192338

申请日：2023-03-29

申请人： Atomera Incorporated

发明人： HIDEKI TAKEUCHI ,  YI-ANN CHEN ,  NYLES WYNN CODY

IPC分类号： H01L27/146

CPC分类号： H01L27/14685

摘要： A method for making an image sensor device may include forming a pixel region within a semiconductor substrate comprising a first dopant having a first conductivity type, forming a first pinning layer on a surface of the substrate and including a second dopant having a second conductivity type different the first conductivity type, and forming a second pinning layer in the semiconductor substrate adjacent at least one side of the pixel region and including a superlattice and the second dopant. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

公开(公告)号：US20240072095A1

公开(公告)日：2024-02-29

申请号：US18192371

申请日：2023-03-29

申请人： Atomera Incorporated

发明人： HIDEKI TAKEUCHI ,  YI-ANN CHEN ,  NYLES WYNN CODY

IPC分类号： H01L27/146

CPC分类号： H01L27/14647 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14689

摘要： An image sensor device may include a semiconductor substrate, a pixel region within the semiconductor substrate comprising a first dopant having a first conductivity type, a first pinning layer on a surface of the substrate and including a second dopant having a second conductivity type different the first conductivity type, and a second pinning layer in the semiconductor substrate adjacent at least one side of the pixel region and including a superlattice and the second dopant. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

公开(公告)号：US20190189669A1

公开(公告)日：2019-06-20

申请号：US15842990

申请日：2017-12-15

申请人： ATOMERA INCORPORATED

发明人： YI-ANN CHEN ,  ABID HUSAIN ,  HIDEKI TAKEUCHI

IPC分类号： H01L27/146 ,  H01L29/15 ,  H01L29/10 ,  H01L29/16

CPC分类号： H01L27/14645 ,  H01L27/14616 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L29/1033 ,  H01L29/152 ,  H01L29/16

摘要： A CMOS image sensor may include a first semiconductor chip including image sensor pixels and readout circuitry electrically connected thereto, and a second semiconductor chip coupled to the first chip in a stack and including image processing circuitry electrically connected to the readout circuitry. The processing circuitry may include a plurality of transistors each including spaced apart source and drain regions and a superlattice channel extending between the source and drain regions. The superlattice channel may include a plurality of stacked groups of layers, each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. Each transistor may further include a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

公开(公告)号：US20190189655A1

公开(公告)日：2019-06-20

申请号：US15842993

申请日：2017-12-15

申请人： ATOMERA INCORPORATED

发明人： YI-ANN CHEN ,  ABID HUSAIN ,  HIDEKI TAKEUCHI

IPC分类号： H01L27/146 ,  H01L29/15 ,  H01L29/10 ,  H01L29/66 ,  H01L29/16 ,  H01L21/02

CPC分类号： H01L27/1469 ,  H01L21/02164 ,  H01L21/02532 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689 ,  H01L29/1033 ,  H01L29/152 ,  H01L29/16 ,  H01L29/66568

摘要： A method for making a CMOS image sensor may include forming a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, forming a second semiconductor chip comprising image processing circuitry electrically connected to the readout circuitry, and coupling the first semiconductor chip and the second semiconductor chip together in a stack. The readout circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.