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公开(公告)号：US20150179277A1
公开(公告)日：2015-06-25
申请号：US14564104
申请日：2014-12-09
Applicant: AU Optronics Corp.
Inventor： Cheng-Chiu Pai , Ming-Hung Chuang , Shu-Wen Tzeng , Wei-Chien Liao
CPC classification number: G09G3/20 , G09G3/3674 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A shift register has an input stage circuit, a first switch, a control circuit and a pull down circuit. A first end of the first switch receives a first clock signal. A second end and a control end of the first switch are respectively coupled to an output end of the shift register and a first output end of the input stage circuit. The control circuit controls electrical connection between a first power terminal and a node according to a second clock signal and controls electrical connection between the node and a second power terminal according to a voltage level of a second output end of the input stage circuit. The pull down circuit controls electrical connection between the second output end and the second power terminal and electrical connection between the output end and the second power terminal according to a voltage level of the node.
Abstract translation: 移位寄存器具有输入级电路，第一开关，控制电路和下拉电路。 第一开关的第一端接收第一时钟信号。 第一开关的第二端和控制端分别耦合到移位寄存器的输出端和输入级电路的第一输出端。 控制电路根据第二时钟信号控制第一电源端子和节点之间的电连接，并且根据输入级电路的第二输出端的电压电平来控制节点与第二电源端子之间的电连接。 下拉电路根据节点的电压水平控制第二输出端和第二电源端子之间的电连接以及输出端和第二电源端子之间的电连接。
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公开(公告)号：US09122352B2
公开(公告)日：2015-09-01
申请号：US14535334
申请日：2014-11-07
Applicant: AU Optronics Corp.
Inventor： An-Thung Cho , Chia-Tien Peng , Hung-Wei Tseng , Cheng-Chiu Pai , Yu-Hsuan Li , Chun-Hsiun Chen , Wei-Ming Huang
IPC: G06F3/042 , H01L31/028 , G06F3/041 , H01L31/18 , H01L31/20 , H01L27/146
CPC classification number: G06F3/0421 , G06F3/0412 , G06F3/042 , G06F2203/04103 , G06F2203/04109 , H01L27/14621 , H01L27/14632 , H01L27/14678 , H01L27/14687 , H01L27/14692 , H01L31/028 , H01L31/182 , H01L31/1824 , H01L31/202
Abstract: A method of forming a photo sensor includes the following steps. A substrate is provided, and a first electrode is formed on the substrate. A first silicon-rich dielectric layer is formed on the first electrode for sensing an infrared ray, wherein the first silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second silicon-rich dielectric layer is formed on the first silicon-rich dielectric layer for sensing visible light beams, wherein the second silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second electrode is formed on the second silicon-rich dielectric layer.
Abstract translation: 一种形成光传感器的方法包括以下步骤。 提供基板，并且在基板上形成第一电极。 第一富硅介电层形成在用于感测红外线的第一电极上，其中第一富硅介电层包括富硅氧化物层，富硅氮化物层或富硅氧氮化物层。 在第一富硅电介质层上形成第二富硅介电层，用于感测可见光束，其中第二富硅介电层包括富硅氧化物层，富硅氮化物层或硅 - 富氮氧化物层。 第二电极形成在第二富硅电介质层上。
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公开(公告)号：US20150206597A1
公开(公告)日：2015-07-23
申请号：US14595228
申请日：2015-01-13
Applicant: AU Optronics Corp.
Inventor： Wei-Chien Liao , Ming-Hung Chuang , Cheng-Chiu Pai , Shu-Wen Tzeng
IPC: G11C19/28
CPC classification number: G11C19/28 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register has a first switch, a pull-up circuit, and a pull-down circuit. The first switch receives a first clock signal. The pull-up circuit is configured to turn on the first switch to pull up a voltage level of an output terminal of the shift register. The pull-up circuit has a second switch and a first control circuit. The first control circuit is coupled to a first system power terminal to avoid an excessive voltage difference between two nodes of the first control circuit. The pull-down circuit is configured to pull down the voltage level of the output terminal of the shift register when the first switch is turned off, and further configured to keep a voltage level of a control node of a switch coupled between the output terminal and a second system power terminal at a low voltage.
Abstract translation: 移位寄存器具有第一开关，上拉电路和下拉电路。 第一开关接收第一时钟信号。 上拉电路被配置为接通第一开关以上拉移位寄存器的输出端子的电压电平。 上拉电路具有第二开关和第一控制电路。 第一控制电路耦合到第一系统电源端子以避免第一控制电路的两个节点之间的过大的电压差。 下拉电路被配置为当第一开关断开时下拉移位寄存器的输出端子的电压电平，并进一步被配置为保持开关的控制节点的电压电平耦合在输出端子和 低电压的第二系统电源端子。
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公开(公告)号：US20150062088A1
公开(公告)日：2015-03-05
申请号：US14535334
申请日：2014-11-07
Applicant: AU Optronics Corp.
Inventor： An-Thung Cho , Chia-Tien Peng , Hung-Wei Tseng , Cheng-Chiu Pai , Yu-Hsuan Li , Chun-Hsiun Chen , Wei-Ming Huang
IPC: G06F3/042 , G06F3/041 , H01L31/028 , H01L31/18 , H01L31/20
CPC classification number: G06F3/0421 , G06F3/0412 , G06F3/042 , G06F2203/04103 , G06F2203/04109 , H01L27/14621 , H01L27/14632 , H01L27/14678 , H01L27/14687 , H01L27/14692 , H01L31/028 , H01L31/182 , H01L31/1824 , H01L31/202
Abstract: A method of forming a photo sensor includes the following steps. A substrate is provided, and a first electrode is formed on the substrate. A first silicon-rich dielectric layer is formed on the first electrode for sensing an infrared ray, wherein the first silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second silicon-rich dielectric layer is formed on the first silicon-rich dielectric layer for sensing visible light beams, wherein the second silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second electrode is formed on the second silicon-rich dielectric layer.
Abstract translation: 一种形成光传感器的方法包括以下步骤。 提供基板，并且在基板上形成第一电极。 第一富硅介电层形成在用于感测红外线的第一电极上，其中第一富硅介电层包括富硅氧化物层，富硅氮化物层或富硅氧氮化物层。 在第一富硅电介质层上形成第二富硅介电层，用于感测可见光束，其中第二富硅介电层包括富硅氧化物层，富硅氮化物层或硅 - 富氮氧化物层。 第二电极形成在第二富硅电介质层上。
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Patent Agency Ranking
公开(公告)号：US20140160096A1
公开(公告)日：2014-06-12
申请号：US14017328
申请日：2013-09-04
Applicant: AU Optronics Corp.
Inventor： Kuo-Ming Li , Cheng-Chiu Pai , Chun-Hung Kuo , Yu-Hsuan Li
IPC: G06F3/038
CPC classification number: G09G3/3614 , G02F1/1345 , G02F1/13454 , G09G2300/0426
Abstract: A display includes a source driver, a demultiplexer, a first data line, a second data line, a first pixel and a second pixel. The demultiplexer includes a first pixel signal transmission unit and a second pixel signal transmission unit. The first pixel signal transmission unit includes a first sub-pixel signal transmission unit, a second sub-pixel signal transmission unit and a third sub-pixel signal transmission unit. The first sub-pixel signal transmission unit and the second sub-pixel signal transmission unit share a drain. A second pixel signal transmission unit next to the first pixel signal transmission unit includes a fourth sub-pixel signal transmission unit, a fifth sub-pixel signal transmission unit and a sixth sub-pixel signal transmission unit. The fourth sub-pixel signal transmission unit and the fifth sub-pixel signal transmission unit share another drain.
Abstract translation: 显示器包括源驱动器，解复用器，第一数据线，第二数据线，第一像素和第二像素。 解复用器包括第一像素信号传输单元和第二像素信号传输单元。 第一像素信号发送单元包括第一子像素信号发送单元，第二子像素信号发送单元和第三子像素信号发送单元。 第一子像素信号发送单元和第二子像素信号发送单元共享漏极。 第一像素信号发送单元旁边的第二像素信号发送单元包括第四子像素信号发送单元，第五子像素信号发送单元和第六子像素信号发送单元。 第四子像素信号发送单元和第五子像素信号发送单元共享另一个漏极。
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公开(公告)号：US09489878B2
公开(公告)日：2016-11-08
申请号：US14564104
申请日：2014-12-09
Applicant: AU Optronics Corp.
Inventor： Cheng-Chiu Pai , Ming-Hung Chuang , Shu-Wen Tzeng , Wei-Chien Liao
CPC classification number: G09G3/20 , G09G3/3674 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A shift register has an input stage circuit, a first switch, a control circuit and a pull down circuit. A first end of the first switch receives a first clock signal. A second end and a control end of the first switch are respectively coupled to an output end of the shift register and a first output end of the input stage circuit. The control circuit controls electrical connection between a first power terminal and a node according to a second clock signal and controls electrical connection between the node and a second power terminal according to a voltage level of a second output end of the input stage circuit. The pull down circuit controls electrical connection between the second output end and the second power terminal and electrical connection between the output end and the second power terminal according to a voltage level of the node.
Abstract translation: 移位寄存器具有输入级电路，第一开关，控制电路和下拉电路。 第一开关的第一端接收第一时钟信号。 第一开关的第二端和控制端分别耦合到移位寄存器的输出端和输入级电路的第一输出端。 控制电路根据第二时钟信号控制第一电源端子和节点之间的电连接，并且根据输入级电路的第二输出端的电压电平来控制节点与第二电源端子之间的电连接。 下拉电路根据节点的电压水平控制第二输出端和第二电源端子之间的电连接以及输出端和第二电源端子之间的电连接。
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公开(公告)号：US09543038B2
公开(公告)日：2017-01-10
申请号：US14595228
申请日：2015-01-13
Applicant: AU Optronics Corp.
Inventor： Wei-Chien Liao , Ming-Hung Chuang , Cheng-Chiu Pai , Shu-Wen Tzeng
CPC classification number: G11C19/28 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register has a first switch, a pull-up circuit, and a pull-down circuit. The first switch receives a first clock signal. The pull-up circuit is configured to turn on the first switch to pull up a voltage level of an output terminal of the shift register. The pull-up circuit has a second switch and a first control circuit. The first control circuit is coupled to a first system power terminal to avoid an excessive voltage difference between two nodes of the first control circuit. The pull-down circuit is configured to pull down the voltage level of the output terminal of the shift register when the first switch is turned off, and further configured to keep a voltage level of a control node of a switch coupled between the output terminal and a second system power terminal at a low voltage.
Abstract translation: 移位寄存器具有第一开关，上拉电路和下拉电路。 第一开关接收第一时钟信号。 上拉电路被配置为接通第一开关以上拉移位寄存器的输出端子的电压电平。 上拉电路具有第二开关和第一控制电路。 第一控制电路耦合到第一系统电源端子，以避免第一控制电路的两个节点之间的过大的电压差。 下拉电路被配置为当第一开关断开时下拉移位寄存器的输出端子的电压电平，并进一步被配置为保持开关的控制节点的电压电平耦合在输出端子和 低电压的第二系统电源端子。
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公开(公告)号：US09536483B2
公开(公告)日：2017-01-03
申请号：US14017328
申请日：2013-09-04
Applicant: AU Optronics Corp.
Inventor： Kuo-Ming Li , Cheng-Chiu Pai , Chun-Hung Kuo , Yu-Hsuan Li
IPC: G09G3/36 , G02F1/1345
CPC classification number: G09G3/3614 , G02F1/1345 , G02F1/13454 , G09G2300/0426
Abstract: A display includes a source driver, a demultiplexer, a first data line, a second data line, a first pixel and a second pixel. The demultiplexer includes a first pixel signal transmission unit and a second pixel signal transmission unit. The first pixel signal transmission unit includes a first sub-pixel signal transmission unit, a second sub-pixel signal transmission unit and a third sub-pixel signal transmission unit. The first sub-pixel signal transmission unit and the second sub-pixel signal transmission unit share a drain. A second pixel signal transmission unit next to the first pixel signal transmission unit includes a fourth sub-pixel signal transmission unit, a fifth sub-pixel signal transmission unit and a sixth sub-pixel signal transmission unit. The fourth sub-pixel signal transmission unit and the fifth sub-pixel signal transmission unit share another drain.
Abstract translation: 显示器包括源驱动器，解复用器，第一数据线，第二数据线，第一像素和第二像素。 解复用器包括第一像素信号传输单元和第二像素信号传输单元。 第一像素信号发送单元包括第一子像素信号发送单元，第二子像素信号发送单元和第三子像素信号发送单元。 第一子像素信号发送单元和第二子像素信号发送单元共享漏极。 第一像素信号发送单元旁边的第二像素信号发送单元包括第四子像素信号发送单元，第五子像素信号发送单元和第六子像素信号发送单元。 第四子像素信号发送单元和第五子像素信号发送单元共享另一个漏极。
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9.发明授权Shift register with higher driving voltage of output stage transistor and flat panel display using the same 有权移位寄存器具有较高的输出级晶体管驱动电压和平板显示器公开(公告)号：US09449712B2
公开(公告)日：2016-09-20
申请号：US14486100
申请日：2014-09-15
Applicant: AU Optronics Corp.
Inventor： Cheng-Chiu Pai , Ming-Hung Chuang
CPC classification number: G11C19/28 , G09G3/3266 , G09G3/3674 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register and flat panel display using the same is provided therein. The shift register receives an operating voltage level. Through the circuit provided by the shift register, a driving voltage of an output-stage transistor is higher than prior art. Thus, the shift register has an enhanced driving ability.
Abstract translation: 在其中提供了移位寄存器和使用其的平板显示器。 移位寄存器接收工作电压电平。 通过由移位寄存器提供的电路，输出级晶体管的驱动电压高于现有技术。 因此，移位寄存器具有增强的驱动能力。
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