INGAN OHMIC SOURCE CONTACTS FOR VERTICAL POWER DEVICES
    1.
    发明申请
    INGAN OHMIC SOURCE CONTACTS FOR VERTICAL POWER DEVICES 有权
    INGAN OHMIC源连接垂直电源设备

    公开(公告)号:US20150255582A1

    公开(公告)日:2015-09-10

    申请号:US14657949

    申请日:2015-03-13

    申请人: AVOGY, INC.

    IPC分类号: H01L29/66 H01L29/808

    摘要: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region. The source includes a GaN-layer coupled to an InGaN layer. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译: 垂直III族氮化物场效应晶体管包括:包含第一III族氮化物材料的漏极,与漏极电耦合的漏极接触点;以及漂移区域,包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区,该沟道区包括耦合到漂移区的第三III族氮化物材料,至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极。 源包括耦合到InGaN层的GaN层。 沟道区域沿着垂直方向设置在漏极和源极之间,使得垂直III族氮化物场效应晶体管的工作期间的电流沿着垂直方向。

    LATERAL GAN JFET WITH VERTICAL DRIFT REGION
    3.
    发明申请
    LATERAL GAN JFET WITH VERTICAL DRIFT REGION 有权
    具有垂直移动区域的横向连杆

    公开(公告)号:US20140131721A1

    公开(公告)日:2014-05-15

    申请号:US13675826

    申请日:2012-11-13

    申请人: AVOGY, INC.

    IPC分类号: H01L29/808 H01L29/20

    摘要: A gallium nitride (GaN)-based junction field-effect transistor (JFET) can include a GaN drain region having a top surface extending in a lateral dimension, a source region, and a GaN channel region of a first conductivity type coupled between the source region and the GaN drain region and operable to conduct electrical current between the source region and the GaN drain region. The JFET can also include a blocking layer disposed between the source region and the GaN drain region such that the GaN channel region is operable to conduct the electrical current substantially along the lateral dimension in a laterally-conductive region of the GaN channel region, and a GaN gate region of a second conductivity type coupled to the GaN channel region such that the laterally-conductive region of the GaN channel region is disposed between at least a portion of the blocking layer and the GaN gate region.

    摘要翻译: 基于氮化镓(GaN)的结场效应晶体管(JFET)可以包括具有在横向尺寸上延伸的顶表面的GaN漏极区域,源极区域和耦合在源极之间的第一导电类型的GaN沟道区域 区域和GaN漏极区域并且可操作以在源极区域和GaN漏极区域之间传导电流。 JFET还可以包括设置在源极区域和GaN漏极区域之间的阻挡层,使得GaN沟道区域可操作地在GaN沟道区域的横向导电区域中沿着横向尺寸传导电流,并且 GaN栅极区域,其耦合到GaN沟道区域,使得GaN沟道区域的横向导电区域设置在阻挡层的至少一部分和GaN栅极区域之间。

    InGaN ohmic source contacts for vertical power devices
    4.
    发明授权
    InGaN ohmic source contacts for vertical power devices 有权
    用于垂直功率器件的InGaN欧姆源触点

    公开(公告)号:US09508838B2

    公开(公告)日:2016-11-29

    申请号:US14657949

    申请日:2015-03-13

    申请人: Avogy, Inc.

    摘要: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region. The source includes a GaN-layer coupled to an InGaN layer. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

    摘要翻译: 垂直III族氮化物场效应晶体管包括:包含第一III族氮化物材料的漏极,与漏极电耦合的漏极接触点;以及漂移区域,包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区,该沟道区包括耦合到漂移区的第三III族氮化物材料,至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极。 源包括耦合到InGaN层的GaN层。 沟道区域沿着垂直方向设置在漏极和源极之间,使得垂直III族氮化物场效应晶体管的工作期间的电流沿垂直方向。

    GaN vertical bipolar transistor
    6.
    发明授权
    GaN vertical bipolar transistor 有权
    GaN垂直双极晶体管

    公开(公告)号:US08823140B2

    公开(公告)日:2014-09-02

    申请号:US13675916

    申请日:2012-11-13

    申请人: Avogy, Inc.

    IPC分类号: H01L29/66

    摘要: An embodiment of a semiconductor device includes a III-nitride base structure of a first conductivity type, and a III-nitride emitter structure of a second conductivity type having a first surface and a second surface. The second surface is substantially opposite the first surface. The first surface of the III-nitride emitter structure is coupled to a surface of the III-nitride base structure. The semiconductor also includes a first dielectric layer coupled to the second surface of the III-nitride emitter structure, and a spacer coupled to a sidewall of the III-nitride emitter structure and the surface of the III-nitride base structure. The semiconductor also includes a base contact structure with a III-nitride material coupled to the spacer, the surface of the III-nitride base structure, and the first dielectric layer, such that the first dielectric layer and the spacer are disposed between the base contact structure and the III-nitride emitter structure.

    摘要翻译: 半导体器件的实施例包括第一导电类型的III族氮化物基底结构和具有第一表面和第二表面的第二导电类型的III族氮化物发射极结构。 第二表面基本上与第一表面相对。 III族氮化物发射极结构的第一表面耦合到III族氮化物基底结构的表面。 半导体还包括耦合到III族氮化物发射极结构的第二表面的第一电介质层和耦合到III族氮化物发射极结构的侧壁和III族氮化物基底结构的表面的间隔物。 该半导体还包括具有连接到间隔物,III族氮化物基底结构的表面和第一介电层的III族氮化物材料的基底接触结构,使得第一介电层和间隔物设置在基底触点 结构和III族氮化物发射极结构。

    Lateral GaN JFET with vertical drift region
    7.
    发明授权
    Lateral GaN JFET with vertical drift region 有权
    具有垂直漂移区域的横向GaN JFET

    公开(公告)号:US09472684B2

    公开(公告)日:2016-10-18

    申请号:US13675826

    申请日:2012-11-13

    申请人: AVOGY, INC.

    摘要: A gallium nitride (GaN)-based junction field-effect transistor (JFET) can include a GaN drain region having a top surface extending in a lateral dimension, a source region, and a GaN channel region of a first conductivity type coupled between the source region and the GaN drain region and operable to conduct electrical current between the source region and the GaN drain region. The JFET can also include a blocking layer disposed between the source region and the GaN drain region such that the GaN channel region is operable to conduct the electrical current substantially along the lateral dimension in a laterally-conductive region of the GaN channel region, and a GaN gate region of a second conductivity type coupled to the GaN channel region such that the laterally-conductive region of the GaN channel region is disposed between at least a portion of the blocking layer and the GaN gate region.

    摘要翻译: 基于氮化镓(GaN)的结场效应晶体管(JFET)可以包括具有在横向尺寸上延伸的顶表面的GaN漏极区域,源极区域和耦合在源极之间的第一导电类型的GaN沟道区域 区域和GaN漏极区域并且可操作以在源极区域和GaN漏极区域之间传导电流。 JFET还可以包括设置在源极区域和GaN漏极区域之间的阻挡层,使得GaN沟道区域可操作地在GaN沟道区域的横向导电区域中沿着横向尺寸传导电流,并且 GaN栅极区域,其耦合到GaN沟道区域,使得GaN沟道区域的横向导电区域设置在阻挡层的至少一部分和GaN栅极区域之间。

    GAN VERTICAL BIPOLAR TRANSISTOR
    9.
    发明申请
    GAN VERTICAL BIPOLAR TRANSISTOR 有权
    GAN垂直双极晶体管

    公开(公告)号:US20140131837A1

    公开(公告)日:2014-05-15

    申请号:US13675916

    申请日:2012-11-13

    申请人: AVOGY, INC.

    IPC分类号: H01L29/73 H01L21/04

    摘要: An embodiment of a semiconductor device includes a III-nitride base structure of a first conductivity type, and a III-nitride emitter structure of a second conductivity type having a first surface and a second surface. The second surface is substantially opposite the first surface. The first surface of the III-nitride emitter structure is coupled to a surface of the III-nitride base structure. The semiconductor also includes a first dielectric layer coupled to the second surface of the III-nitride emitter structure, and a spacer coupled to a sidewall of the III-nitride emitter structure and the surface of the III-nitride base structure. The semiconductor also includes a base contact structure with a III-nitride material coupled to the spacer, the surface of the III-nitride base structure, and the first dielectric layer, such that the first dielectric layer and the spacer are disposed between the base contact structure and the III-nitride emitter structure.

    摘要翻译: 半导体器件的实施例包括第一导电类型的III族氮化物基底结构和具有第一表面和第二表面的第二导电类型的III族氮化物发射极结构。 第二表面基本上与第一表面相对。 III族氮化物发射极结构的第一表面耦合到III族氮化物基底结构的表面。 半导体还包括耦合到III族氮化物发射极结构的第二表面的第一电介质层和耦合到III族氮化物发射极结构的侧壁和III族氮化物基底结构的表面的间隔物。 该半导体还包括具有连接到间隔物,III族氮化物基底结构的表面和第一介电层的III族氮化物材料的基底接触结构,使得第一介电层和间隔物设置在基底触点 结构和III族氮化物发射极结构。