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公开(公告)号：US10585801B2
公开(公告)日：2020-03-10
申请号：US13685133
申请日：2012-11-26
Applicant: Advanced Micro Devices, Inc.
Inventor： Nuwan S. Jayasena , James Michael O'Connor , Michael Mantor
IPC: G06F12/08 , G06F12/0862 , G06F9/52 , G06F8/41
Abstract: Embodiments include methods, systems and computer readable media configured to execute a first kernel (e.g. compute or graphics kernel) with reduced intermediate state storage resource requirements. These include executing a first and second (e.g. prefetch) kernel on a data-parallel processor, such that the second kernel begins executing before the first kernel. The second kernel performs memory operations that are based upon at least a subset of memory operations in the first kernel.
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公开(公告)号：US11954036B2
公开(公告)日：2024-04-09
申请号：US17985674
申请日：2022-11-11
Applicant: Advanced Micro Devices, Inc.
Inventor： Nuwan S. Jayasena , James Michael O'Connor , Michael Mantor
IPC: G06F12/0862 , G06F8/41 , G06F9/52
CPC classification number: G06F12/0862 , G06F8/4442 , G06F9/52 , Y02D10/00
Abstract: Embodiments include methods, systems and non-transitory computer-readable computer readable media including instructions for executing a prefetch kernel that includes memory accesses for prefetching data for a processing kernel into a memory, and, subsequent to executing at least a portion of the prefetch kernel, executing the processing kernel where the processing kernel includes accesses to data that is stored into the memory resulting from execution of the prefetch kernel.
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公开(公告)号：US11500778B2
公开(公告)日：2022-11-15
申请号：US16813075
申请日：2020-03-09
Applicant: Advanced Micro Devices, Inc.
Inventor： Nuwan S. Jayasena , James Michael O'Connor , Michael Mantor
IPC: G06F12/0862 , G06F9/52 , G06F8/41
Abstract: Embodiments include methods, systems and non-transitory computer-readable computer readable media including instructions for executing a prefetch kernel with reduced intermediate state storage resource requirements. These include executing a prefetch kernel on a graphics processing unit (GPU), such that the prefetch kernel begins executing before a processing kernel. The prefetch kernel performs memory operations that are based upon at least a subset of memory operations in the processing kernel.
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4.发明授权公开(公告)号：US09244629B2
公开(公告)日：2016-01-26
申请号：US13926765
申请日：2013-06-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Lisa R. Hsu , Gabriel H. Loh , James Michael O'Connor , Nuwan S. Jayasena
CPC classification number: G06F3/067 , G06F9/4881 , G06F9/5033 , G06F12/1036 , G06F2212/302
Abstract: Methods, systems and computer readable storage mediums for more efficient and flexible scheduling of tasks on an asymmetric processing system having at least one host processor and one or more slave processors, are disclosed. An example embodiment includes, determining a data access requirement of a task, comparing the data access requirement to respective local memories of the one or more slave processors selecting a slave processor from the one or more slave processors based upon the comparing, and running the task on the selected slave processor.
Abstract translation: 公开了用于在具有至少一个主处理器和一个或多个从属处理器的非对称处理系统上更有效和灵活地调度任务的方法，系统和计算机可读存储介质。 一个示例实施例包括：确定任务的数据访问需求，将数据访问要求与一个或多个从属处理器的相应本地存储器进行比较，所述一个或多个从属处理器基于比较而从一个或多个从属处理器中选择从属处理器，并且执行任务 在所选的从属处理器上。
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Patent Agency Ranking
5.发明申请公开(公告)号：US20140380003A1
公开(公告)日：2014-12-25
申请号：US13926765
申请日：2013-06-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Lisa R. Hsu , Gabriel H. Loh , James Michael O'Connor , Nuwan S. Jayasena
CPC classification number: G06F3/067 , G06F9/4881 , G06F9/5033 , G06F12/1036 , G06F2212/302
Abstract: Methods, systems and computer readable storage mediums for more efficient and flexible scheduling of tasks on an asymmetric processing system having at least one host processor and one or more slave processors, are disclosed. An example embodiment includes, determining a data access requirement of a task, comparing the data access requirement to respective local memories of the one or more slave processors selecting a slave processor from the one or more slave processors based upon the comparing, and running the task on the selected slave processor.
Abstract translation: 公开了用于在具有至少一个主处理器和一个或多个从属处理器的非对称处理系统上更有效和灵活地调度任务的方法，系统和计算机可读存储介质。 一个示例实施例包括：确定任务的数据访问需求，将数据访问要求与一个或多个从属处理器的相应本地存储器进行比较，所述一个或多个从属处理器基于比较而从一个或多个从属处理器中选择从属处理器，并且执行任务 在所选的从属处理器上。
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公开(公告)号：US20230076872A1
公开(公告)日：2023-03-09
申请号：US17985674
申请日：2022-11-11
Applicant: Advanced Micro Devices, Inc.
Inventor： Nuwan S. Jayasena , James Michael O'Connor , Michael Mantor
IPC: G06F12/0862 , G06F9/52 , G06F8/41
Abstract: Embodiments include methods, systems and non-transitory computer-readable computer readable media including instructions for executing a prefetch kernel that includes memory accesses for prefetching data for a processing kernel into a memory, and, subsequent to executing at least a portion of the prefetch kernel, executing the processing kernel where the processing kernel includes accesses to data that is stored into the memory resulting from execution of the prefetch kernel.
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公开(公告)号：US11301256B2
公开(公告)日：2022-04-12
申请号：US14466080
申请日：2014-08-22
Applicant: Advanced Micro Devices, Inc.
Inventor： Lisa R. Hsu , James Michael O'Connor
Abstract: Embodiments disclose a system and method for reducing virtual address translation latency in a wide execution engine that implements virtual memory. One example method describes a method comprising receiving a wavefront, classifying the wavefront into a subset based on classification criteria selected to reduce virtual address translation latency associated with a memory support structure, and scheduling the wavefront for processing based on the classifying.
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公开(公告)号：US20200210341A1
公开(公告)日：2020-07-02
申请号：US16813075
申请日：2020-03-09
Applicant: Advanced Micro Devices, Inc.
Inventor： Nuwan S. Jayasena , James Michael O'Connor , Michael Mantor
IPC: G06F12/0862 , G06F9/52 , G06F8/41
Abstract: Embodiments include methods, systems and non-transitory computer-readable computer readable media including instructions for executing a prefetch kernel with reduced intermediate state storage resource requirements. These include executing a prefetch kernel on a graphics processing unit (GPU), such that the prefetch kernel begins executing before a processing kernel. The prefetch kernel performs memory operations that are based upon at least a subset of memory operations in the processing kernel.
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公开(公告)号：US20160055005A1
公开(公告)日：2016-02-25
申请号：US14466080
申请日：2014-08-22
Applicant: Advanced Micro Devices, Inc.
Inventor： Lisa R. HSU , James Michael O'Connor
CPC classification number: G06F9/3887 , G06F12/1027 , G06F2212/654
Abstract: Embodiments disclose a system and method for reducing virtual address translation latency in a wide execution engine that implements virtual memory. One example method describes a method comprising receiving a wavefront, classifying the wavefront into a subset based on classification criteria selected to reduce virtual address translation latency associated with a memory support structure, and scheduling the wavefront for processing based on the classifying.
Abstract translation: 实施例公开了一种在实现虚拟存储器的宽执行引擎中减少虚拟地址转换等待时间的系统和方法。 一个示例性方法描述了一种方法，包括接收波阵面，基于所选择的分类标准将波阵面分类为子集，以减少与存储器支持结构相关联的虚拟地址转换延迟，以及基于分类调度波阵面进行处理。
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