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公开(公告)号：US20230046477A1
公开(公告)日：2023-02-16
申请号：US17545108
申请日：2021-12-08
摘要： A data transmission system includes a first circuit, a second circuit, and a reference voltage generation circuit. The first circuit includes a transmitter powered by a first power supply voltage and having an input for receiving a data output signal, and an output. The second circuit includes a receiver powered by a second power supply voltage and having a first input coupled to the output of the transmitter, a second input for receiving a reference voltage, and an output for providing a data input signal. The reference voltage generation circuit forms the reference voltage by mixing a first signal generated by the first circuit based on the first power supply voltage and a second signal generated by the second circuit based on the second power supply voltage.
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公开(公告)号：US20240111618A1
公开(公告)日：2024-04-04
申请号：US17956542
申请日：2022-09-29
IPC分类号： G06F11/07
CPC分类号： G06F11/079 , G06F11/073
摘要： A method for receiving a multi-level error signal having more than two logic levels includes oversampling the multi-level error signal to provide sampled symbols, wherein a first level of the multi-level error signal indicates no error, and second and third levels of the multi-level error signal indicate first and second error conditions, respectively. The sampled signals are de-serialized to provide sets of symbols. A start of a symbol period is determined in response to detecting that a given sample is different from a prior sample, and the prior sample indicates no error. The sets of symbols are filtered to provide corresponding output symbols based on the start.
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公开(公告)号：US11757489B2
公开(公告)日：2023-09-12
申请号：US17545108
申请日：2021-12-08
摘要： A data transmission system includes a first circuit, a second circuit, and a reference voltage generation circuit. The first circuit includes a transmitter powered by a first power supply voltage and having an input for receiving a data output signal, and an output. The second circuit includes a receiver powered by a second power supply voltage and having a first input coupled to the output of the transmitter, a second input for receiving a reference voltage, and an output for providing a data input signal. The reference voltage generation circuit forms the reference voltage by mixing a first signal generated by the first circuit based on the first power supply voltage and a second signal generated by the second circuit based on the second power supply voltage.
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公开(公告)号：US12101135B2
公开(公告)日：2024-09-24
申请号：US18243243
申请日：2023-09-07
摘要： An integrated circuit includes a first terminal for receiving a data signal, a second terminal for receiving an external reference voltage, a receiver, and a reference voltage generation circuit. The receiver is powered by a power supply voltage with respect to ground and has a first input coupled to the first terminal, a second input for receiving a shared reference voltage, and an output for providing a data input signal. The reference voltage generation circuit is coupled to the second terminal and receives the power supply voltage. The reference voltage generation circuit is operable to form the shared reference voltage by mixing noise from the power supply voltage and noise from the second terminal.
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公开(公告)号：US20230421203A1
公开(公告)日：2023-12-28
申请号：US18243243
申请日：2023-09-07
摘要： An integrated circuit includes a first terminal for receiving a data signal, a second terminal for receiving an external reference voltage, a receiver, and a reference voltage generation circuit. The receiver is powered by a power supply voltage with respect to ground and has a first input coupled to the first terminal, a second input for receiving a shared reference voltage, and an output for providing a data input signal. The reference voltage generation circuit is coupled to the second terminal and receives the power supply voltage. The reference voltage generation circuit is operable to form the shared reference voltage by mixing noise from the power supply voltage and noise from the second terminal.
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公开(公告)号：US12093124B2
公开(公告)日：2024-09-17
申请号：US17956542
申请日：2022-09-29
IPC分类号： G06F11/07
CPC分类号： G06F11/079 , G06F11/073
摘要： A method for receiving a multi-level error signal having more than two logic levels includes oversampling the multi-level error signal to provide sampled symbols, wherein a first level of the multi-level error signal indicates no error, and second and third levels of the multi-level error signal indicate first and second error conditions, respectively. The sampled signals are de-serialized to provide sets of symbols. A start of a symbol period is determined in response to detecting that a given sample is different from a prior sample, and the prior sample indicates no error. The sets of symbols are filtered to provide corresponding output symbols based on the start.
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公开(公告)号：US20240223192A1
公开(公告)日：2024-07-04
申请号：US18092222
申请日：2022-12-31
发明人： Pradeep Jayaraman , Ramon Mangaser
CPC分类号： H03L7/07 , H03L7/0814 , H03L7/0816
摘要： A multi-phase clock gating circuit receives a plurality of respective phased clock signals, and a one-hot stop phase select signal indicating a first selected phase for which gating of the phased clock signals is to be started. Responsive to a clock control signal indicating the phased clock signals are to be gated, the clock signals are gated beginning at the first selected phase, in order of phase, including looping from a last phase to a first phase.
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公开(公告)号：US20230290400A1
公开(公告)日：2023-09-14
申请号：US17855094
申请日：2022-06-30
IPC分类号： G11C11/4074 , G11C11/4093 , G06F13/40
CPC分类号： G11C11/4074 , G11C11/4093 , G06F13/4027
摘要： A data transmission system includes a first integrated circuit. The first integrated circuit includes a first mixing terminal coupled to a first power supply voltage terminal at a point internal to the first integrated circuit, a first return terminal, a first resistor having a first terminal coupled to the first mixing terminal, and a second terminal for providing a first mixed voltage, and a second resistor having a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to the first return terminal.
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