公开(公告)号：US11437322B2

公开(公告)日：2022-09-06

申请号：US16560862

申请日：2019-09-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/538 ,  H01L23/13 ,  H01L25/16 ,  H01L23/552 ,  H01L23/31

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US12165984B2

公开(公告)日：2024-12-10

申请号：US17903921

申请日：2022-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L23/552 ,  H01L25/16

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US11094602B2

公开(公告)日：2021-08-17

申请号：US16537371

申请日：2019-08-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L23/40

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US11776863B2

公开(公告)日：2023-10-03

申请号：US17404912

申请日：2021-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tun-Ching Pi ,  Sung-Hung Chiang ,  Yu-Chang Chen

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L23/40

CPC classification number: H01L23/13 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2023/4087

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US10381300B2

公开(公告)日：2019-08-13

申请号：US15362548

申请日：2016-11-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Chieh Kao ,  Chang-Lin Yeh ,  Yi Chen ,  Sung-Hung Chiang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/02 ,  H01L23/00 ,  H01L23/552 ,  H01L23/31 ,  H01L23/538

Abstract: A semiconductor device package includes a substrate, a package body, a via and an interconnect. The substrate includes a surface and a pad on the first surface. The package body covers at least a portion of the surface of the substrate. The via is disposed in the package body and includes a conductive layer and a first intermediate layer. The conductive layer is electrically connected with the pad. The first intermediate layer is adjacent to the conductive layer. The interconnect is disposed on the first intermediate layer.