公开(公告)号：US20120166723A1

公开(公告)日：2012-06-28

申请号：US13054467

申请日：2010-12-27

申请人： Akihiko Araki ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yusuke Nonaka

IPC分类号： G06F12/08

CPC分类号： G06F12/0871 ,  G06F12/0246 ,  G06F12/0873 ,  G06F12/121 ,  G06F2212/1021 ,  G06F2212/222 ,  G06F2212/262 ,  G06F2212/282 ,  G06F2212/466 ,  G06F2212/7208

摘要： An embodiment of this invention divides a cache memory of a storage system into a plurality of partitions and information in one or more of the partitions is composed of data different from user data and including control information. The storage system dynamically swaps data between an LU storing control information and a cache partition. Through this configuration, in a storage system having an upper limit in the capacity of the cache memory, a large amount of control information can be used while access performance to control information is kept.

摘要翻译： 本发明的实施例将存储系统的高速缓冲存储器划分为多个分区，并且一个或多个分区中的信息由与用户数据不同的数据组成并且包括控制信息。 存储系统在LU存储控制信息和高速缓存分区之间动态地交换数据。 通过这种配置，在具有高速缓冲存储器的容量上限的存储系统中，可以使用大量的控制信息，同时保持对控制信息的访问性能。

公开(公告)号：US08108595B2

公开(公告)日：2012-01-31

申请号：US13193130

申请日：2011-07-28

申请人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： To extend endurance and reduce bit cost, a method and a storage apparatus are provided, which storage apparatus includes a controller and a semiconductor storage media that includes a first storage device and a second storage device having an upper limit of an erase count of data smaller than the first storage device. Area conversion information includes correspondence of a first address to be specified as a data storage destination and a second address of an area in which data is to be stored. A rewrite frequency of stored data is recorded for each area. The controller selects an area corresponding to the first address, determines whether or not the rewrite frequency of the selected area is equal to or larger than a first threshold value, when the rewrite frequency is equal to or larger than the threshold value, selects an area to be provided by the first storage device, and when the rewrite frequency is smaller than the threshold value, selects an area to be provided by the second storage device and maps the address of the selected area to the first address.

摘要翻译： 为了延长耐久性和降低比特成本，提供了一种方法和存储装置，该存储装置包括控制器和半导体存储介质，该半导体存储介质包括第一存储装置和第二存储装置，其具有较小数据的擦除次数的上限 比第一个存储设备。 区域转换信息包括要指定为数据存储目的地的第一地址和要存储数据的区域的第二地址的对应关系。 记录每个区域的存储数据的重写频率。 控制器选择对应于第一地址的区域，确定所选区域的重写频率是否等于或大于第一阈值，当重写频率等于或大于阈值时，选择一个区域 由第一存储装置提供，并且当重写频率小于阈值时，选择由第二存储装置提供的区域，并将所选区域的地址映射到第一地址。

公开(公告)号：US08539150B2

公开(公告)日：2013-09-17

申请号：US13054467

申请日：2010-12-27

申请人： Akihiko Araki ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yusuke Nonaka

IPC分类号： G06F12/00

CPC分类号： G06F12/0871 ,  G06F12/0246 ,  G06F12/0873 ,  G06F12/121 ,  G06F2212/1021 ,  G06F2212/222 ,  G06F2212/262 ,  G06F2212/282 ,  G06F2212/466 ,  G06F2212/7208

摘要： An embodiment of this invention divides a cache memory of a storage system into a plurality of partitions and information in one or more of the partitions is composed of data different from user data and including control information. The storage system dynamically swaps data between an LU storing control information and a cache partition. Through this configuration, in a storage system having an upper limit in the capacity of the cache memory, a large amount of control information can be used while access performance to control information is kept.

摘要翻译： 本发明的一个实施例将存储系统的高速缓冲存储器划分为多个分区，并且一个或多个分区中的信息由与用户数据不同的数据组成并且包括控制信息。 存储系统在LU存储控制信息和高速缓存分区之间动态地交换数据。 通过这种配置，在具有高速缓冲存储器的容量上限的存储系统中，可以使用大量的控制信息，同时保持对控制信息的访问性能。

公开(公告)号：US08473704B2

公开(公告)日：2013-06-25

申请号：US12742262

申请日：2010-04-28

申请人： Akihiko Araki ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yusuke Nonaka

IPC分类号： G06F12/02 ,  G06F13/18

CPC分类号： G06F3/061 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0671

摘要： With respect to a storage system in which quick formatting and sequential formatting can be run concurrently, the time it takes to process an access request from a host is prevented from becoming prolonged even when a normal sequential formatting process is executed with respect to a storage volume which frequently incurs I/O penalties. The storage device measures the load from the host per configurational unit (storage medium) of LUs, and divides the LUs into a group of LUs whose load per storage medium is low, and a group of LUs whose load per storage medium is high. Further, the density per unit of LU capacity of I/O penalties incurred in a storage volume for which quick formatting is being executed is calculated. Sequential formatting is then executed, with priority, with respect to the LUs belonging to the group with low loads and in order of descending density of incurred I/O penalties.

摘要翻译： 对于可以同时运行快速格式化和顺序格式化的存储系统，即使当相对于存储卷执行正常的顺序格式化处理时，也可以防止处理来自主机的访问请求所花费的时间延长 这经常导致I / O处罚。 存储装置测量来自主机的每个配置单元（存储介质）的负载，并将LU分为一组存储介质负荷低的一组LU，以及一组存储介质负载高的LU组。 此外，计算在执行快速格式化的存储卷中产生的I / O惩罚单位LU容量的密度。 然后，对于属于低负载组的逻辑单元并按照发生的I / O处罚密度下降的顺序，优先执行顺序格式化。

公开(公告)号：US08489806B2

公开(公告)日：2013-07-16

申请号：US13361430

申请日：2012-01-30

申请人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： To extend endurance and reduce bit cost, a storage apparatus includes a controller and a first storage device and a second storage device having a smaller erase count upper limit than the first storage device. Area conversion information includes correspondence of a first address of a data storage destination and a second address of a data storage area The controller selects an area corresponding to the first address, determines whether a rewrite frequency of the selected area is equal to or larger than a first threshold and, when the rewrite frequency is equal to or larger than the threshold, selects an area of the first storage device, and, when the rewrite frequency is smaller than the threshold, selects an area of the second storage device and maps the address of the selected area to the first address.

摘要翻译： 为了延长耐久性并降低位成本，存储装置包括控制器和具有比第一存储装置更小的擦除次数上限的第一存储装置和第二存储装置。 区域转换信息包括数据存储目的地的第一地址和数据存储区域的第二地址的对应关系。控制器选择对应于第一地址的区域，确定所选区域的重写频率是否等于或大于 第一阈值，并且当重写频率等于或大于阈值时，选择第一存储装置的区域，并且当重写频率小于阈值时，选择第二存储装置的区域并映射地址 的所选区域到第一个地址。

公开(公告)号：US20120131271A1

公开(公告)日：2012-05-24

申请号：US12742262

申请日：2010-04-28

申请人： Akihiko Araki ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yusuke Nonaka

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F3/061 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0671

摘要： With respect to a storage system in which quick formatting and sequential formatting can be run concurrently, the time it takes to process an access request from a host is prevented from becoming prolonged even when a normal sequential formatting process is executed with respect to a storage volume which frequently incurs I/O penalties. The storage device measures the load from the host per configurational unit (storage medium) of LUs, and divides the LUs into a group of LUs whose load per storage medium is low, and a group of LUs whose load per storage medium is high. Further, the density per unit of LU capacity of I/O penalties incurred in a storage volume for which quick formatting is being executed is calculated. Sequential formatting is then executed, with priority, with respect to the LUs belonging to the group with low loads and in order of descending density of incurred I/O penalties.

摘要翻译： 对于可以同时运行快速格式化和顺序格式化的存储系统，即使当相对于存储卷执行正常的顺序格式化处理时，也可以防止处理来自主机的访问请求所花费的时间延长 这经常导致I / O处罚。 存储装置测量来自主机的每个配置单元（存储介质）的负载，并将LU分为一组存储介质负荷低的一组LU，以及一组存储介质负载高的LU组。 此外，计算在执行快速格式化的存储卷中产生的I / O惩罚单位LU容量的密度。 然后，对于属于低负载组的逻辑单元并按照发生的I / O处罚密度下降的顺序，优先执行顺序格式化。

公开(公告)号：US08015371B2

公开(公告)日：2011-09-06

申请号：US12338138

申请日：2008-12-18

申请人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

发明人： Akihiko Araki ,  Yoshiki Kano ,  Sadahiro Sugimoto ,  Yusuke Nonaka

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： Disclosed is a storage apparatus that extends endurance and reduces bit cost. A storage apparatus includes a controller and a semiconductor storage media that has a plurality of storage devices. The plurality of storage devices include a first storage device and a second storage device having an upper limit of an erase count of data smaller than that of the first storage device. Area conversion information includes correspondence of a first address to be specified as a data storage destination and a second address of an area in which data is to be stored. A rewrite frequency of stored data is recorded for each area. The controller selects an area corresponding to the first address, determines whether or not the rewrite frequency of the selected area is equal to or larger than a first threshold value, when the rewrite frequency is equal to or larger than the threshold value, selects an area to be provided by the first storage device, and when the rewrite frequency is smaller than the threshold value, selects an area to be provided by the second storage device and maps the address of the selected area to the first address.

摘要翻译： 公开了一种延长耐用性并降低钻头成本的存储装置。 存储装置包括具有多个存储装置的控制器和半导体存储介质。 多个存储装置包括第一存储装置和具有比第一存储装置小的数据的擦除次数的上限的第二存储装置。 区域转换信息包括要指定为数据存储目的地的第一地址和要存储数据的区域的第二地址的对应关系。 记录每个区域的存储数据的重写频率。 控制器选择对应于第一地址的区域，确定所选区域的重写频率是否等于或大于第一阈值，当重写频率等于或大于阈值时，选择一个区域 由第一存储装置提供，并且当重写频率小于阈值时，选择由第二存储装置提供的区域，并将所选区域的地址映射到第一地址。

公开(公告)号：US20130305003A1

公开(公告)日：2013-11-14

申请号：US13511509

申请日：2012-05-11

申请人： Takaki Matsushita ,  Akira Deguchi ,  Hiroaki Akutsu ,  Akihiko Araki

发明人： Takaki Matsushita ,  Akira Deguchi ,  Hiroaki Akutsu ,  Akihiko Araki

IPC分类号： G06F12/16

CPC分类号： G06F3/0608 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0671 ,  G06F11/1458

摘要： The present invention provides high-speed copying of a compressed data volume.The control unit of the storage apparatus divides the pool into a plurality of chunks comprising a plurality of pages storing data, compresses data which is written to the logical volume by the host and assigns one of the plurality of chunks to a compressed data logical volume which stores the compressed data, and, when the compressed data logical volume is copied, the control unit makes the page length of the chunk which is assigned to the compressed data logical volume which is the copy source the same as the page length of the chunk which is assigned to the compressed data logical volume which is the copy destination.

摘要翻译： 本发明提供压缩数据量的高速复制。 存储装置的控制单元将该池划分为包含存储数据的多个页面的多个块，压缩由主机写入逻辑卷的数据，并将多个块中的一个分配给压缩数据逻辑卷，该压缩数据逻辑卷 存储压缩数据，并且当压缩数据逻辑卷被复制时，控制单元使分配给作为复制源的压缩数据逻辑卷的块的页面长度与块的页面长度相同， 被分配给作为复制目的地的压缩数据逻辑卷。

公开(公告)号：US20110246701A1

公开(公告)日：2011-10-06

申请号：US12527441

申请日：2009-03-24

申请人： Yoshiki Kano ,  Sadahiro Sugimoto ,  Akira Yamamoto ,  Akihiko Araki ,  Masayuki Yamamoto

发明人： Yoshiki Kano ,  Sadahiro Sugimoto ,  Akira Yamamoto ,  Akihiko Araki ,  Masayuki Yamamoto

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7208 ,  G06F2212/7211 ,  G11C16/349 ,  G11C16/3495

摘要： Efficient leveling among a plurality of FMPKs 130 including a newly added or replaced FMPK 130. When a storage controller 110 lacks free blocks in real FMPKs 130 and any FMPK 130 of the real FMPKs 130 and an added substitute FMPK 130 are selected as leveling object devices, if the attribute of a block in the real FMPK 130 belonging to the leveling object devices is “Hot,” data larger than a threshold value from among data belonging to that block is migrated to a block in the substitute FMPK 130; or if the attribute of a block in the real FMPK 130 belonging to the leveling object devices is “Cold,” data smaller than the threshold value from among data belonging to that block is migrated to a block in the substitute FMPK 130.

摘要翻译： 包括新添加或替换的FMPK 130的多个FMPK 130中的高效调平。当存储控制器110在实际FMPK 130中缺少空闲块并且真实FMPK 130的任何FMPK 130和添加的替换FMPK 130被选择为调平对象设备 如果属于调平对象设备的实际FMPK 130中的块的属性为“Hot”，则属于该块的数据中大于阈值的数据被迁移到替代FMPK 130中的块; 或者如果属于调平对象装置的真实FMPK 130中的块的属性为“冷”，则属于该块的数据中小于阈值的数据被迁移到替代FMPK 130中的块。

公开(公告)号：US4870935A

公开(公告)日：1989-10-03

申请号：US218266

申请日：1988-07-13

申请人： Akihiko Araki

发明人： Akihiko Araki

IPC分类号： F02P5/15

CPC分类号： F02P5/1504 ,  Y02T10/46

摘要： A spark ignition control system distinguishes engine operating condition between low engine load range where acceleration shock tends to be created and high engine load range where acceleration shock to be created is small and better acceleration characteristics is required. The spark ignition timing control system performs spark advance retarding control while the engine is in the low engine load range and in response to acceleration demand. On the other hand, the spark advance retarding control is disabled in the high engine load range.

摘要翻译： 一种火花点火控制系统，用于区分发动机加速冲击的低发动机负荷范围和要产生加速冲击的发动机负荷范围小，需要更好的加速特性的发动机运转状态。 火花点火正时控制系统在发动机处于低发动机负荷范围内并响应加速要求时执行火花提前延迟控制。 另一方面，在高发动机负载范围内禁止火花提前延迟控制。