公开(公告)号：US07060635B2

公开(公告)日：2006-06-13

申请号：US10603077

申请日：2003-06-25

申请人： Akihiko Otoguro ,  Satoshi Takechi ,  Takatoshi Deguchi

发明人： Akihiko Otoguro ,  Satoshi Takechi ,  Takatoshi Deguchi

IPC分类号： H01L21/31

CPC分类号： H01L21/76811 ,  G03F7/0757 ,  G03F7/091 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/3122 ,  Y10S438/942 ,  Y10S438/952

摘要： The present invention provides a method of manufacturing a semiconductor device which includes a step of forming a laminated film for pattern formation on a substrate, in which the laminated film for pattern formation includes an innermost layer, an inner layer and a surface layer, an extinction coefficient k of the innermost layer is 0.3 or more, and an extinction coefficient k of the inner layer is 0.12 or more. It also provides a method of forming a pattern which includes a step of forming a laminated film for pattern formation on a substrate, in which the laminated film for pattern formation includes an innermost layer, an inner layer and a surface layer, an extinction coefficient k of the innermost layer is 0.3 or more, and an extinction coefficient k of the inner layer is 0.12 or more.

摘要翻译： 本发明提供一种制造半导体器件的方法，该方法包括在基片上形成用于图形形成的叠层薄膜的步骤，其中图形形成用叠层薄膜包括最内层，内层和表面层，消光 最内层的系数k为0.3以上，内层的消光系数k为0.12以上。 还提供了形成图案的方法，其包括在基板上形成用于图案形成的层叠膜的步骤，其中用于图案形成的层叠膜包括最内层，内层和表面层，消光系数k 最内层的消光系数k为0.12以上。

公开(公告)号：US06887649B2

公开(公告)日：2005-05-03

申请号：US10092310

申请日：2002-03-07

申请人： Akihiko Otoguro ,  Satoshi Takechi

发明人： Akihiko Otoguro ,  Satoshi Takechi

IPC分类号： G03F7/075 ,  G03F7/11 ,  H01L21/027 ,  H01L21/308 ,  H01L21/311 ,  G03F7/004

CPC分类号： G03F7/0758 ,  G03F7/11 ,  H01L21/0275 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31144 ,  Y10S430/146

摘要： There are provided steps of forming a lower resist layer on a patterning objective layer, forming an organic intermediate layer made of organic material, that contains no Si—O bond in its structure, on the lower resist layer, forming an upper resist layer made of alicyclic resin on the organic intermediate layer, forming a pattern by exposing/developing the upper resist layer, transferring the pattern of the upper resist layer onto the organic intermediate layer by etching the organic intermediate layer while using the upper resist layer as a mask, transferring a pattern of the organic intermediate layer onto the lower resist layer by etching the lower resist layer while using the organic intermediate layer as a mask, and etching the patterning objective layer while using the lower resist layer as a mask. Accordingly, a semiconductor device manufacturing method containing patterning steps employing a multi-layered resist structure, that is capable of suppressing deformation of the pattern of the upper resist layer formed of alicyclic compound, can be provided.

摘要翻译： 提供了在图案化目标层上形成下抗蚀剂层的步骤，在下抗蚀剂层上形成由下列抗蚀剂层构成的由有机材料构成的有机中间层，其中不包含Si-O键，形成上层抗蚀剂层 在有机中间层上形成脂环族树脂，通过曝光/显影上抗蚀剂层形成图案，通过蚀刻有机中间层将上抗蚀剂层的图案转印到有机中间层上，同时使用上抗蚀剂层作为掩模，转印 通过在使用有机中间层作为掩模的同时蚀刻下抗蚀剂层而将有机中间层的图案涂覆到下抗蚀剂层上，并且在使用下抗蚀剂层作为掩模的同时蚀刻图案化目标层。 因此，可以提供包含能够抑制由脂环族化合物形成的上抗蚀剂层的图案的变形的采用多层抗蚀剂结构的图案化步骤的半导体器件制造方法。