Method of laying out an integrated circuit with specific alignment of
the collector contact with the emitter region
    1.
    发明授权
    Method of laying out an integrated circuit with specific alignment of the collector contact with the emitter region 失效
    布置具有集电极触点与发射极区域的特定对准的集成电路的方法

    公开(公告)号:US4272882A

    公开(公告)日:1981-06-16

    申请号:US147574

    申请日:1980-05-08

    申请人: Albert W. Fisher

    发明人: Albert W. Fisher

    CPC分类号: H01L29/41708 H01L21/324

    摘要: The method entails laying out NPN transistors in a bipolar integrated circuit in a manner which prevents crystal dislocations from making the transistor unreliable. The long edges of the collector contacts are aligned in a direction substantially perpendicular to the direction between the collector contact and the emitter-base junction.

    摘要翻译: 该方法需要在双极集成电路中以防止晶体位错使晶体管不可靠的方式布置NPN晶体管。 集电极触点的长边沿基本上垂直于集电极触点和发射极 - 基极结之间的方向排列。

    Patterned metallization for integrated circuits
    2.
    发明授权
    Patterned metallization for integrated circuits 失效
    集成电路图案化金属化

    公开(公告)号:US4695868A

    公开(公告)日:1987-09-22

    申请号:US808531

    申请日:1985-12-13

    申请人: Albert W. Fisher

    发明人: Albert W. Fisher

    摘要: Large areas of metallization on a semiconductor surface are replaced with an interconnected pattern of metallization. When an area of metallization is covered with a layer of dielectric glass having a thermal coefficient of expansion substantially different from that of the metallization, use of the subject interconnected pattern of metallization significantly enhances the stability of the structure to thermal stress.

    摘要翻译: 半导体表面上的大面积金属化被金属化的互连图案所取代。 当金属化区域被具有与金属化基本上不同的热膨胀系数的电介质玻璃层覆盖时,使用被连接的金属化互连图案显着提高了结构对热应力的稳定性。

    Local oxidation of silicon substrate using LPCVD silicon nitride
    3.
    发明授权
    Local oxidation of silicon substrate using LPCVD silicon nitride 失效
    使用LPCVD氮化硅对硅衬底进行局部氧化处理

    公开(公告)号:US4472459A

    公开(公告)日:1984-09-18

    申请号:US545048

    申请日:1983-10-24

    申请人: Albert W. Fisher

    发明人: Albert W. Fisher

    摘要: The formation of silicon dioxide isolated silicon islands on the surface of a substrate is improved by utilizing as an oxidation mask a patterned layer of silicon nitride which is deposited by LPCVD directly onto the surface of the silicon wafer. The subject method substantially reduces the incidence of stress related defects in the silicon surface and therefore eliminates the need for a layer of pad oxide which, if present, would cause "bird's beak" formation.

    摘要翻译: 通过利用通过LPCVD直接沉积到硅晶片的表面上的氮化硅图案化层作为氧化掩模,改善了衬底表面上二氧化硅隔离硅岛的形成。 本发明的方法基本上减少了硅表面中应力相关缺陷的发生率,因此不需要一层衬垫氧化物,如果存在这种衬垫氧化物将会导致“鸟的喙”形成。

    Method of edge doping SOI islands
    4.
    发明授权
    Method of edge doping SOI islands 失效
    边缘掺杂SOI岛的方法

    公开(公告)号:US5053345A

    公开(公告)日:1991-10-01

    申请号:US306356

    申请日:1989-02-20

    摘要: SOI islands having doped edges are formed by providing over the surface of a layer of single crystalline silicon on an insulating substrate a masking layer formed of two layers, the lowermost layer adjacent the silicon layer being silicon oxide and the uppermost layer being silicon nitride. The masking layer is defined using standard photolithographic techniques and etching to form the masking layer over only the areas of the silicon layer which are to form the islands. The uncovered portion of the silicon layer is then removed by etching to form the islands. The lowermost layer of the masking layer is then etched laterally away from the edges of the island to expose a portion of the surface of the silicon layer adjacent the edges of the islands. After removing the uppermost layer of the masking layer, the exposed edge portions of the surface of the silicon layer are doped by ion implantation to form the islands with doped edges.

    摘要翻译: 具有掺杂边缘的SOI岛通过在绝缘基板上的绝缘基板上的单晶硅层的表面上提供由两层形成的掩模层,最靠近硅层的氧化硅层和最上层为氮化硅形成。 使用标准光刻技术和蚀刻限定掩模层,以在仅形成岛的区域的硅层上形成掩模层。 然后通过蚀刻去除硅层的未覆盖部分以形成岛。 然后将掩模层的最下层从岛的边缘横向蚀刻,以暴露邻近岛的边缘的硅层表面的一部分。 在去除掩模层的最上层之后,通过离子注入掺杂硅层表面的暴露的边缘部分以形成具有掺杂边缘的岛。

    Method of making a multi-level metallization structure for semiconductor
device
    5.
    发明授权
    Method of making a multi-level metallization structure for semiconductor device 失效
    制造半导体器件多级金属化结构的方法

    公开(公告)号:US4520554A

    公开(公告)日:1985-06-04

    申请号:US676948

    申请日:1984-11-30

    申请人: Albert W. Fisher

    发明人: Albert W. Fisher

    摘要: A semiconductor device having a multi-level metallization system wherein the first level is of aluminum containing up to 3 of percent silicon and the second level is either aluminum or aluminum containing silicon in an amount less than that contained in the first level. The two levels where they contact each other are sintered together with some of the silicon from the first level being diffused into the second level so that the second level has a region adjacent the junction between the two levels which has a higher content of silicon than the remaining portion of the second level. When making the device, the surface of the first level where it is to be joined with the second level is etched to remove some of the aluminum, but not the silicon, which roughens this surface. The second level is applied on this roughened surface and the device is heated to sinter the two levels together and diffuse the silicon into the second level.

    摘要翻译: 一种具有多级金属化系统的半导体器件,其中第一级为含有至多3%的硅的铝,而第二级为含有少于第一级含量的铝或铝的硅。 它们彼此接触的两个层级被烧结在一起,其中来自第一层的一些硅被扩散到第二层中,使得第二层具有邻近两层之间的结的区域,这两层之间的接合点具有比 二级剩余部分。 当制造该装置时,蚀刻要与第二层连接的第一层的表面以除去一些铝,而不是粗糙化该表面的硅。 将第二级施加在该粗糙表面上,并且加热该装置以将两个层结合在一起并将硅扩散到第二层。

    Method for determining silicon content in layers of aluminum and silicon
    6.
    发明授权
    Method for determining silicon content in layers of aluminum and silicon 失效
    用于确定铝和硅层中硅含量的方法

    公开(公告)号:US4282266A

    公开(公告)日:1981-08-04

    申请号:US154598

    申请日:1980-05-29

    申请人: Albert W. Fisher

    发明人: Albert W. Fisher

    IPC分类号: H01L21/66 B05D5/12 C23F1/00

    摘要: The method provides an extremely fast and non-destructive method for determining whether an integrated circuit will have good bonding characteristics. The method entails immersion plating of copper onto aluminum areas. Then, the aluminum areas are observed visually to see if the copper plated thereon is continuous or discontinuous. If the copper is discontinuous, the aluminum film will have good bonding characteristics.

    摘要翻译: 该方法提供了用于确定集成电路是否具有良好的结合特性的非常快速且非破坏性的方法。 该方法需要将铜浸入铝区域。 然后,目视观察铝区域,看看其上镀铜是连续的还是不连续的。 如果铜不连续,则铝膜具有良好的接合特性。