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1.发明申请公开(公告)号：US20060133540A1
公开(公告)日：2006-06-22
申请号：US11069194
申请日：2005-02-28
Applicant: Alexander Eglit
Inventor： Alexander Eglit
IPC: H04L27/16
CPC classification number: H04L7/0054 , H04L7/0338
Abstract: An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the different sampling phases, the detector inspects some amount of look-behind and look-ahead information in order to improve upon simple symbol-by-symbol detection. The over-sampled information is used to further improve detection performance.
Abstract translation: 过采样序列检测器对采样数据进行操作，并跟踪采样数据的检测可靠性。 检测器单独分析不同采样阶段的样品序列，然后选择一个允许最可靠检测的样品序列。 对于不同的采样阶段，检测器检查一些量的前瞻和预先信息，以便改进简单的符号符号检测。 过采样信息用于进一步提高检测性能。
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2.发明授权Apparatus and method for horizontally and vertically positioning a VGA display image on the screen of a flat panel display 失效将VGA显示图像水平和垂直地定位在平板显示器的屏幕上的装置和方法
公开(公告)号：US5682170A
公开(公告)日：1997-10-28
申请号：US509651
申请日：1995-07-31
Applicant: Sridhar Kotha , Alexander Eglit , Robin Han
Inventor： Sridhar Kotha , Alexander Eglit , Robin Han
CPC classification number: G09G5/391 , G09G3/20 , G09G5/26 , G09G2340/0407 , G09G2340/0485 , G09G5/363
Abstract: A method and apparatus for horizontally and vertically positioning a video graphics adapter (VGA) display image on the screen of a flat panel display (FPD) is provided with a first counter for setting a horizontal FPD disable period associated with the FPD. A second counter sets the horizontal FPD enable period of the FPD. This horizontal FPD enable period is greater than a composite horizontal pixel time of a VGA image to be displayed. A first circuit controls the start time of a subsequent horizontal FPD enable period. This start time is based on the horizontal FPD disable period. A second circuit controls the end time of the subsequent horizontal FPD enable period. This end time is based on the horizontal FPD enable period. The VGA display image is begun based on the start time of the subsequent horizontal FPD enable period to locate the VGA display image at a desired horizontal position of the FPD screen. The vertical positioning of the image is performed by similar counters and circuits.
Abstract translation: 在平板显示器（FPD）的屏幕上水平和垂直地定位视频图形适配器（VGA）显示图像的方法和装置设置有用于设置与FPD相关联的水平FPD禁用时段的第一计数器。 第二个计数器设置FPD的水平FPD使能周期。 该水平FPD使能周期大于要显示的VGA图像的复合水平像素时间。 第一电路控制随后的水平FPD使能期间的开始时间。 该开始时间基于水平FPD禁用期。 第二电路控制随后的水平FPD使能期间的结束时间。 该结束时间是基于水平FPD使能周期。 基于随后的水平FPD使能周期的开始时间开始VGA显示图像，以将VGA显示图像定位在FPD屏幕的期望水平位置。 图像的垂直定位由类似的计数器和电路执行。
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公开(公告)号：US20070071153A1
公开(公告)日：2007-03-29
申请号：US11238629
申请日：2005-09-28
Applicant: Alexander Eglit
Inventor： Alexander Eglit
CPC classification number: H04L25/03019 , H04L7/0054 , H04L7/0338 , H04L25/0216
Abstract: An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the different sampling phases, the detector inspects some amount of look-behind and look-ahead information in order to improve upon simple symbol-by-symbol detection. The over-sampled information is used to further improve detection performance.
Abstract translation: 过采样序列检测器对采样数据进行操作，并跟踪采样数据的检测可靠性。 检测器单独分析不同采样阶段的样品序列，然后选择一个允许最可靠检测的样品序列。 对于不同的采样阶段，检测器检查一些量的前瞻和预先信息，以便改进简单的符号符号检测。 过采样信息用于进一步提高检测性能。
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公开(公告)号：US6023266A
公开(公告)日：2000-02-08
申请号：US764876
申请日：1996-12-03
Applicant: Alexander Eglit , Rakesh Kumar Bindlish , Vlad Bril
Inventor： Alexander Eglit , Rakesh Kumar Bindlish , Vlad Bril
CPC classification number: H04N21/4143 , G09G5/395 , G09G5/42 , H04N19/00 , H04N19/98
Abstract: Motion video may be imported into a personal or portable computer through an I/O port having a limited data bandwidth, such as a PCMCIA interface. Motion video data is compressed by sub-sampling both luminance and chrominance difference data for different sized groups of pixels. The compression apparatus may be formed on a PCMCIA card which interfaces with a personal or portable computer. Motion video data, compressed by as much as 5:1 or 6:1, is transferred through the PCMCIA card to a host computer. The host computer may serialize the compressed data and store the data in serialized compressed format in a video memory of a video controller. The video controller is provided with decompression circuitry to decompress the motion video data into luminance and chrominance difference data. The luminance and chrominance difference data is converted into RGB data and displayed in a video display.
Abstract translation: 运动视频可以通过具有有限数据带宽的I / O端口（例如PCMCIA接口）导入个人或便携式计算机。 运动视频数据通过对不同大小的像素组的亮度和色差差分数据进行二次采样而被压缩。 压缩装置可以形成在与个人或便携式计算机接口的PCMCIA卡上。 压缩多达5：1或6：1的运动视频数据通过PCMCIA卡传输到主机。 主机可以串行化压缩数据，并将数据以串行压缩格式存储在视频控制器的视频存储器中。 视频控制器设置有解压缩电路，以将运动视频数据解压缩为亮度和色差差数据。 亮度和色差差数据被转换成RGB数据并显示在视频显示器中。
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Patent Agency Ranking
公开(公告)号：US5611041A
公开(公告)日：1997-03-11
申请号：US359315
申请日：1994-12-19
Applicant: Vlad Bril , Alexander Eglit , Sagar W. Kenkare
Inventor： Vlad Bril , Alexander Eglit , Sagar W. Kenkare
IPC: G06F12/00 , G06F12/02 , G09G5/00 , G09G5/14 , G09G5/18 , G09G5/36 , G09G5/39 , G09G5/393 , G09G5/395 , G09G5/40
Abstract: A memory controller, particularly for use in a video controller, is provided which reduces the effect of page misses during memory access. A video port FIFO is provided for buffering data from a video port to a display memory. A CRT FIFO is provided for buffering data from a display memory to a display. If, during a video port FIFO cycle, a page miss is encountered, the video port FIFO cycle is terminated and processing passes to a CRT FIFO CYCLE. If a page miss is encountered during a CRT FIFO cycle, the subsequent video port FIFO cycle will shortened by a number of memory cycles to compensate for the additional memory cycles required by the page miss. Additional data accumulated in the video port FIFO may be transferred to the display memory during a retrace interval. In this manner, memory bandwidth is optimized by removing a non-aligned page miss as the worst case of memory bandwidth utilization.
Abstract translation: 提供了特别用于视频控制器的存储器控制器，其减少了存储器访问期间页错误的影响。 视频端口FIFO被提供用于缓冲从视频端口到显示存储器的数据。 提供CRT FIFO用于将数据从显示存储器缓存到显示器。 如果在视频端口FIFO周期期间遇到页面未命中，则视频端口FIFO周期终止，并且处理转到CRT FIFO CYCLE。 如果在CRT FIFO周期期间遇到页错，则后续视频端口FIFO周期将缩短多个存储周期，以补偿页错过所需的额外存储周期。 视频端口FIFO中积累的附加数据可以在回扫间隔期间传送到显示存储器。 以这种方式，通过消除不对齐的页面遗漏作为存储器带宽利用的最坏情况来优化存储器带宽。
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公开(公告)号：US20080056421A1
公开(公告)日：2008-03-06
申请号：US11931962
申请日：2007-10-31
Applicant: Alexander Eglit
Inventor： Alexander Eglit
IPC: H04L7/00
CPC classification number: H04L7/0054 , H04L7/0338
Abstract: An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the different sampling phases, the detector inspects some amount of look-behind and look-ahead information in order to improve upon simple symbol-by-symbol detection. The over-sampled information is used to further improve detection performance.
Abstract translation: 过采样序列检测器对采样数据进行操作，并跟踪采样数据的检测可靠性。 检测器单独分析不同采样阶段的样品序列，然后选择一个允许最可靠检测的样品序列。 对于不同的采样阶段，检测器检查一些量的前瞻和预先信息，以便改进简单的符号符号检测。 过采样信息用于进一步提高检测性能。
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公开(公告)号：US5642139A
公开(公告)日：1997-06-24
申请号：US235761
申请日：1994-04-29
Applicant: Alexander Eglit , Rakesh Kumar Bindlish , Vlad Bril
Inventor： Alexander Eglit , Rakesh Kumar Bindlish , Vlad Bril
CPC classification number: H04N21/4143 , G09G5/395 , G09G5/42 , H04N19/00 , H04N19/98
Abstract: Motion video may be imported into a personal or portable computer through an I/O port having a limited data bandwidth, such as a PCMCIA interface. Motion video data is compressed by sub-sampling both luminance and chrominance difference data for different sized groups of pixels. The compression apparatus may be formed on a PCMCIA card which interfaces with a personal or portable computer. Motion video data, compressed by as much as 5:1 or 6:1, is transferred through the PCMCIA card to a host computer. The host computer may serialize the compressed data and store the data in serialized compressed format in a video memory of a video controller. The video controller is provided with decompression circuitry to decompress the motion video data into luminance and chrominance difference data. The luminance and chrominance difference data is converted into RGB data and displayed in a video display.
Abstract translation: 运动视频可以通过具有有限数据带宽的I / O端口（例如PCMCIA接口）导入个人或便携式计算机。 运动视频数据通过对不同大小的像素组的亮度和色差差分数据进行二次采样而被压缩。 压缩装置可以形成在与个人或便携式计算机接口的PCMCIA卡上。 压缩多达5：1或6：1的运动视频数据通过PCMCIA卡传输到主机。 主机可以串行化压缩数据，并将数据以串行压缩格式存储在视频控制器的视频存储器中。 视频控制器设置有解压缩电路，以将运动视频数据解压缩为亮度和色差差数据。 亮度和色差差数据被转换成RGB数据并显示在视频显示器中。
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公开(公告)号：US5608864A
公开(公告)日：1997-03-04
申请号：US235764
申请日：1994-04-29
Applicant: Rakesh K. Bindlish , Vlad Bril , Alexander Eglit
Inventor： Rakesh K. Bindlish , Vlad Bril , Alexander Eglit
IPC: G06F3/14 , G06F3/048 , G06F3/153 , G09G5/00 , G09G5/14 , G09G5/36 , G09G5/38 , H04N5/265 , H04N5/45 , G06F12/00
CPC classification number: G09G5/14 , H04N5/45 , G09G2340/125
Abstract: A computer video controller, particularly a VGA or SVGA video controller for use with graphical user interface (GUI) software such as WINDOWS.TM. or OS/2.TM. is provided with two video data pipelines for simultaneously displaying full motion video within a window in a video display. A first data pipeline displays background video at a first pixel depth. A second data pipeline is provided to display a motion video window at a second, usually higher, pixel depth. The location of the motion video window is measured horizontally in number of memory fetch cycles needed to retrieve the horizontal scan line of pixel data abutting the motion video window. The width of the motion video window is measured in the number of memory fetches required to retrieve one scan line of the motion video window. By providing two parallel data pipelines having equal delays, the motion video window can be generated by selectively retrieving background pixel data or motion video window pixel data and transferring the data to the appropriate pipeline. In an alternative embodiment, data tags may be used to distinguished between background and motion video window pixel data. The controller may also support various compression formats for motion video.
Abstract translation: 具有用于诸如WINDOWS TM或OS / 2 TM的图形用户界面（GUI）软件的VGA或SVGA视频控制器的计算机视频控制器被提供有两个视频数据流水线，用于在视频窗口中同时显示全部运动视频 显示。 第一数据流水线以第一像素深度显示背景视频。 提供第二数据流水线以在第二通常较高的像素深度处显示运动视频窗口。 水平地测量运动视频窗口的位置以检索与运动视频窗口相邻的像素数据的水平扫描行所需的存储器提取周期数。 以检索运动视频窗口的一条扫描线所需的存储器提取量来测量运动视频窗口的宽度。 通过提供具有相等延迟的两个并行数据流水线，可以通过选择性地检索背景像素数据或运动视频窗口像素数据并将数据传送到适当的流水线来生成运动视频窗口。 在替代实施例中，可以使用数据标签来区分背景和运动视频窗口像素数据。 控制器还可以支持用于运动视频的各种压缩格式。
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9.发明授权
公开(公告)号：US5521614A
公开(公告)日：1996-05-28
申请号：US235827
申请日：1994-04-29
Applicant: Sridhar Kotha , Alexander Eglit , Robin Han
Inventor： Sridhar Kotha , Alexander Eglit , Robin Han
CPC classification number: G09G5/391 , G09G3/20 , G09G5/26 , G09G2340/0407 , G09G2340/0485 , G09G5/363
Abstract: A method and apparatus for expanding a video graphics adapter (VGA) text character to fully fill the screen of a flat panel display. The present invention stores binary information representing a horizontal row of character text. A prescribed bit in the binary information may be set to determine whether to duplicate pixels associated with the binary information in either a horizontal or vertical direction. A circuit is provided to ensure that foreground and background characteristics of the graphics character text being expanded are consistent with the sent prescribed bit in the binary information.
Abstract translation: 一种用于扩展视频图形适配器（VGA）文本字符以完全填充平板显示器的屏幕的方法和装置。 本发明存储表示字符文本的水平行的二进制信息。 可以设置二进制信息中的规定位以确定是在水平还是垂直方向上复制与二进制信息相关联的像素。 提供电路以确保正在扩展的图形字符文本的前景和背景特征与二进制信息中发送的规定位一致。
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