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公开(公告)号：US08050648B1
公开(公告)日：2011-11-01
申请号：US12725426
申请日：2010-03-16
IPC分类号： H04B1/26 , H04B1/18 , H04B1/16 , H04B7/216 , H04B10/00 , H03K19/195 , H03K19/21 , H03K3/289 , H03K17/00 , G06F7/50 , G06F15/00 , H03B19/00 , H03B15/00 , G11C11/44 , G11C11/00 , H01L39/22 , H03M1/00 , H04L27/00 , H04L25/03 , H04L25/49 , H04L27/06 , H04K1/02
CPC分类号： H03D7/005
摘要： Digital mixers which permit mixing of asynchronous signals may be constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
摘要翻译： 允许异步信号混合的数字混频器可以由快速单通量子（RSFQ）逻辑元件构成。 逻辑元件可以包括RSFQ非破坏性读出单元（NDRO），RSFQ D触发器，RSFQ XOR电路和RSFQ T触发器。 可以使用T触发器的二叉树布置来提供参考信号的同相和正交相位分割副本。 混合元件可以是XOR电路，用作多路复用器的双端口NDRO电路或用作AND门的RS型NDRO。 RSFQ逻辑元件利用在超导温度域中工作的约瑟夫逊结。
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公开(公告)号：US07680474B2
公开(公告)日：2010-03-16
申请号：US11243019
申请日：2005-10-04
IPC分类号： H04B1/26 , H04B7/216 , H03M1/00 , H03M3/00 , H03M1/12 , H04L12/50 , H04Q11/00 , H04L27/06 , H03D1/00 , G06F7/52
CPC分类号： H03D7/005
摘要： Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
摘要翻译： 允许混合异步信号的数字混频器由快速单通量量子（RSFQ）逻辑元件构成。 逻辑元件可以包括RSFQ非破坏性读出单元（NDRO），RSFQ D触发器，RSFQ XOR电路和RSFQ T触发器。 可以使用T触发器的二叉树布置来提供参考信号的同相和正交相位分割副本。 混合元件可以是XOR电路，用作多路复用器的双端口NDRO电路或用作AND门的RS型NDRO。 RSFQ逻辑元件利用在超导温度域中工作的约瑟夫逊结。
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公开(公告)号：US20070077906A1
公开(公告)日：2007-04-05
申请号：US11243019
申请日：2005-10-04
IPC分类号： H04B1/26
CPC分类号： H03D7/005
摘要： Digital mixers which permit mixing of asynchronous signals is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
摘要翻译： 允许异步信号混合的数字混频器由快速单通量量子（RSFQ）逻辑元件构成。 逻辑元件可以包括RSFQ非破坏性读出单元（NDRO），RSFQ D触发器，RSFQ XOR电路和RSFQ T触发器。 可以使用T触发器的二叉树布置来提供参考信号的同相和正交相位分割副本。 混合元件可以是XOR电路，用作多路复用器的双端口NDRO电路或用作AND门的RS型NDRO。 RSFQ逻辑元件利用在超导温度域中工作的约瑟夫逊结。
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公开(公告)号：US07362125B2
公开(公告)日：2008-04-22
申请号：US11424121
申请日：2006-06-14
IPC分类号： H03K19/195
CPC分类号： H04B1/44 , H03K17/92 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： Routing and distribution of radio-frequency (RF) signals is commonly achieved in the analog domain. However, improved performance and simplified circuit architectures may be obtained by first digitizing the RF signal, and then carrying out all routing in the digital domain. A new generation of scalable digital switches has been developed, which routes both the data and clock signals together, this being necessary to maintain the integrity of the digitized RF signal. Given the extremely high switching speeds necessary for these applications (tens of GHz), this is implemented using Rapid-Single-Flux-Quantum (RSFQ) logic with superconducting integrated circuits. Such a digital switch matrix may be applied to either the receiver or transmitter components of an advanced multi-band, multi-channel digital transceiver system, and is compatible with routing of signals with different clock frequencies simultaneously within the same switch matrix.
摘要翻译： 射频（RF）信号的路由和分配通常在模拟域中实现。 然而，可以通过首先数字化RF信号，然后在数字域中执行所有路由来获得改进的性能和简化的电路架构。 已经开发出新一代可扩展的数字交换机，其将数据和时钟信号路由到一起，这是维持数字化RF信号的完整性所必需的。 鉴于这些应用（数十GHz）所需的极高开关速度，这使用具有超导集成电路的快速单通量量子（RSFQ）逻辑实现。 这种数字开关矩阵可以应用于高级多频带多声道数字收发器系统的接收器或发射器部件，并且可以在相同的开关矩阵内同时路由具有不同时钟频率的信号。
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公开(公告)号：US20070293160A1
公开(公告)日：2007-12-20
申请号：US11424121
申请日：2006-06-14
CPC分类号： H04B1/44 , H03K17/92 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： Routing and distribution of radio-frequency (RF) signals is commonly achieved in the analog domain. However, improved performance and simplified circuit architectures may be obtained by first digitizing the RF signal, and then carrying out all routing in the digital domain. A new generation of scalable digital switches has been developed, which routes both the data and clock signals together, this being necessary to maintain the integrity of the digitized RF signal. Given the extremely high switching speeds necessary for these applications (tens of GHz), this is implemented using Rapid-Single-Flux-Quantum (RSFQ) logic with superconducting integrated circuits. Such a digital switch matrix may be applied to either the receiver or transmitter components of an advanced multi-band, multi-channel digital transceiver system, and is compatible with routing of signals with different clock frequencies simultaneously within the same switch matrix.
摘要翻译： 射频（RF）信号的路由和分配通常在模拟域中实现。 然而，可以通过首先数字化RF信号，然后在数字域中执行所有路由来获得改进的性能和简化的电路架构。 已经开发出新一代可扩展的数字交换机，其将数据和时钟信号路由到一起，这是维持数字化RF信号的完整性所必需的。 鉴于这些应用（数十GHz）所需的极高开关速度，这使用具有超导集成电路的快速单通量量子（RSFQ）逻辑实现。 这种数字开关矩阵可以应用于高级多频带多声道数字收发器系统的接收器或发射器部件，并且可以在相同的开关矩阵内同时路由具有不同时钟频率的信号。
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公开(公告)号：US06653962B2
公开(公告)日：2003-11-25
申请号：US09999864
申请日：2001-10-19
IPC分类号： H03M112
CPC分类号： H03M1/005 , G04F10/005 , H03M1/60
摘要： A dual function superconducting digitizer circuit which can selectively function either as an analog-to-digital converter (ADC) or as a time-to-digital converter (TDC). Superconducting ADCs and TDCs can provide performance far superior to that obtained using conventional electronics by taking advantage of the intrinsic properties—high switching speed, quantum accuracy, dispersion-less transmission lines, radiation hardness, and extremely low power dissipation—of superconductivity. Since both ADC and TDC functions are desired in most measurement systems, a dual-function digitizer is not only more attractive from a system integration perspective but is also more marketable.
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公开(公告)号：US07956640B2
公开(公告)日：2011-06-07
申请号：US11966918
申请日：2007-12-28
IPC分类号： H03K19/177
CPC分类号： H04B1/44 , H03K17/92 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： A digital radio frequency switch system and method, adapted to receive a plurality of inputs, generate a plurality of outputs, and simultaneously route a plurality of inputs to any of a plurality of outputs, comprising an array comprising a plurality of inputs, having a plurality of associated clocks; a digital control input adapted to receive a signal indicative of a mapping between at least one of said inputs and at least one respective output; a digital logic array, responsive to said digital control input for simultaneously communicating a plurality of signals each corresponding to one of the plurality of inputs and a respective associated clock to at least one of said outputs indicated by the digital control input; and an array of the outputs, each adapted to present a regenerated signal corresponding to one of the plurality of inputs and a respective associated synchronized regenerated clock maintaining accurate relative timing therebetween.
摘要翻译： 一种适于接收多个输入的数字射频切换系统和方法，产生多个输出，并且同时将多个输入路由到多个输出中的任一个，包括包括多个输入的阵列，具有多个输入 的相关时钟; 数字控制输入，适于接收指示所述输入中的至少一个与至少一个相应输出之间的映射的信号; 数字逻辑阵列，响应于所述数字控制输入，用于同时将与多个输入中的一个输入相对应的多个信号和相应的相关联的时钟传送到由数字控制输入指示的至少一个输出; 以及输出的阵列，每个输出适于呈现对应于所述多个输入中的一个的再生信号和相应的相关联的同步再生时钟，以保持它们之间的准确的相对定时。
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公开(公告)号：US20090086533A1
公开(公告)日：2009-04-02
申请号：US12258682
申请日：2008-10-27
IPC分类号： G11C11/44
CPC分类号： G11C8/10 , Y10S505/831 , Y10S505/837
摘要： A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
摘要翻译： 使用快速单通量量子（RSFQ）逻辑元件设计高速查找表，并使用超导集成电路制造。 查找表由地址解码器和可编程只读存储器阵列（PROM）组成。 存储器阵列具有快速的并行流水线读出和较慢的存储器内容的串行重新编程。 使用标准的非破坏性复位触发器（RSN单元）和数据触发器（DFF单元）构建存储单元。 n位地址解码器以相同的技术实现并与存储器阵列紧密集成，以实现作为查找表的高速操作。 电路架构可扩展到大型二维数据阵列。
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公开(公告)号：US08401600B1
公开(公告)日：2013-03-19
申请号：US13196494
申请日：2011-08-02
CPC分类号： H03D7/005 , H01L39/025 , H01L39/223 , H04B1/0014
摘要： A superconducting multi-bit digital mixer, designed using rapid single flux quantum (RSFQ) logic, for multiplying two independent digital streams, at least one of these comprising a plurality of parallel bit lines, wherein the output is also a similar plurality of bit lines. In a preferred embodiment, one of the digital streams represents a local oscillator signal, and the other digital stream digital radio frequency input from an analog-to-digital converter. The multi-bit mixer comprises an array of bit-slices, with the local oscillator signal generated using shift registers. This multi-bit mixer is suitable for an integrated circuit with application to a broadband digital radio frequency receiver, a digital correlation receiver, or a digital radio frequency transmitter. A synchronous pulse distribution network is used to ensure proper operation at data rates of 20 GHz or above.
摘要翻译： 一种使用快速单通量量（RSFQ）逻辑设计的超导多位数字混频器，用于将两个独立数字流相乘，其中至少一个包括多个并行位线，其中该输出也是相似的多个位线 。 在优选实施例中，数字流中的一个表示本地振荡器信号，并且另一个数字流数字射频从模数转换器输入。 该多位混频器包括一个位片阵列，本地振荡器信号由移位寄存器产生。 该多位混频器适用于应用于宽带数字射频接收机，数字相关接收机或数字射频发射机的集成电路。 使用同步脉冲分配网络来确保在20 GHz或更高的数据速率下正常工作。
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公开(公告)号：US07903456B2
公开(公告)日：2011-03-08
申请号：US12258682
申请日：2008-10-27
IPC分类号： G11C11/44
CPC分类号： G11C8/10 , Y10S505/831 , Y10S505/837
摘要： A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
摘要翻译： 使用快速单通量量子（RSFQ）逻辑元件设计高速查找表，并使用超导集成电路制造。 查找表由地址解码器和可编程只读存储器阵列（PROM）组成。 存储器阵列具有快速的并行流水线读出和较慢的存储器内容的串行重新编程。 使用标准的非破坏性复位触发器（RSN单元）和数据触发器（DFF单元）构建存储单元。 n位地址解码器以相同的技术实现并与存储器阵列紧密集成，以实现作为查找表的高速操作。 电路架构可扩展到大型二维数据阵列。
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