摘要:
Device, system and method of modeling homogeneous information. For example, a method that includes providing to a model-based application an input model including a refinable homogeneous record having a base type, wherein said homogeneous record is defined with a homogeneous constraint to only include data members of a type compatible with the base type. The homogeneous record is defined in a modeling environment that is able to automatically enforce the homogeneous constraint for the homogeneous record and for refinements thereof.
摘要:
Device, system and method of modeling homogeneous information. For example, a method that includes providing to a model-based application an input model including a refinable homogeneous record having a base type, wherein said homogeneous record is defined with a homogeneous constraint to only include data members of a type compatible with the base type. The homogeneous record is defined in a modeling environment that is able to automatically enforce the homogeneous constraint for the homogeneous record and for refinements thereof.
摘要:
A test program generator that produces test instructions according to a specification of a system being verified. The instructions are typically generated randomly, at least in part, and are then. The system is capable of interpreting events, detecting an impending occurrence of an event, and responding to the event by switching to an alternate input stream.
摘要:
Improvements in functional verification of a design are achieved by providing a test template that specifies test parameters directed to a function of the design. An exemption mode of operation is associated with a portion of the template, in which constraints and variables associated with the template are revised. The template is an input to a CSP engine, which, in cooperation with a test generator engine, produces test scenarios that lie in an expanded region of the generator's usual operational space. Provision is made for independently enabling and disabling a plurality of exemption modes of operation that are associated with the same or different areas of the template.
摘要:
A test code generation technique that replaces instructions having a machine state dependent result with special redirection instructions provides generation of test code in which state dependent execution choices are made without a state model. Redirection instructions cause execution of a handler than examines the machine state and replaces the redirection instruction with a replacement instruction having a desired result resolved in accordance with the current machine state. The instructions that are replaced may be conditional branch instructions and the result a desired execution path. The examination of the machine state permits determination of a branch condition for the replacement instruction so that the next pass of the test code executes along the desired path. Alternatively, the handler can execute a jump to the branch instruction, causing immediate execution of the desired branch path. The re-direction instructions may be illegal instructions, which cause execution of an interrupt handler that performs the replacement.
摘要:
Device, system and method for verification of a hardware system-under-test including at least one processor. A method includes building an executable image of a hardware exerciser adapted for execution on a test platform selected from: a simulation accelerator, a hardware emulator, a prototype hardware system, and a hardware production wafer. The exerciser image includes embedded data corresponding to architectural knowledge, testing knowledge, and a test template. The test template is defined in a context-free formal language and includes biasing directives to influence at least one of a desired test structure, one or more resources to be included in the test, and one or more values of the included resources. The architectural knowledge is obtained from an architectural model including a formal description of the specification for the system-under-test, and the testing knowledge is obtained from a testing knowledgebase including heuristics for testing desired aspects of the system-under-test.
摘要:
Device, system and method for verification of a hardware system-under-test including at least one processor. A method includes building an executable image of a hardware exerciser adapted for execution on a test platform selected from: a simulation accelerator, a hardware emulator, a prototype hardware system, and a hardware production wafer. The exerciser image includes embedded data corresponding to architectural knowledge, testing knowledge, and a test template. The test template is defined in a context-free formal language and includes biasing directives to influence at least one of a desired test structure, one or more resources to be included in the test, and one or more values of the included resources. The architectural knowledge is obtained from an architectural model including a formal description of the specification for the system-under-test, and the testing knowledge is obtained from a testing knowledgebase including heuristics for testing desired aspects of the system-under-test.
摘要:
A test code generation technique that replaces instructions having a machine state dependent result with special redirection instructions provides generation of test code in which state dependent execution choices are made without a state model. Redirection instructions cause execution of a handler than examines the machine state and replaces the redirection instruction with a replacement instruction having a desired result resolved in accordance with the current machine state. The instructions that are replaced may be conditional branch instructions and the result a desired execution path. The examination of the machine state permits determination of a branch condition for the replacement instruction so that the next pass of the test code executes along the desired path. Alternatively, the handler can execute a jump to the branch instruction, causing immediate execution of the desired branch path. The re-direction instructions may be illegal instructions, which cause execution of an interrupt handler that performs the replacement.
摘要:
Methods and systems are disclosed that enhance the ability of a test generator to automatically deal with address translation in a processor design, and without need for creating specific code. A model of the address translation mechanism of a design-under-test is represented as a directed acyclic graph and then converted into a constraint satisfaction problem. The problem is solved by a CSP engine, and the solution used to generate test cases for execution. Using the model, testing knowledge can be propagated to models applicable to many different designs to produce extensive coverage of address translation mechanisms.
摘要:
A method for automatically generating test programs includes receiving a description of a system under test, expressed in terms of variables associated with the system and conditional constraints including semantics applied to the variables, and receiving a definition of an event to be tested in the system. The method generates an ECondCSP over the variables responsively to the definition of the event and to the conditional constraints, such that at least some of the semantics of the conditional constraints are preserved in the ECondCSP when one or more of the variables to which the semantics are applied are inactive. The ECondCSP is solved to generate a test case for the system.