SYSTEM ON A CHIP COMPRISING AN I/O STEERING ENGINE
    1.
    发明申请
    SYSTEM ON A CHIP COMPRISING AN I/O STEERING ENGINE 有权
    包括I / O转向发动机的芯片系统

    公开(公告)号:US20160239445A1

    公开(公告)日:2016-08-18

    申请号:US14623914

    申请日:2015-02-17

    CPC classification number: G06F13/364 G06F13/00 G06F13/122 G06F13/128 H04L63/00

    Abstract: Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.

    Abstract translation: 该技术的实施例可以提供一个或多个I / O资源的转向以在片上系统(SoC)上计算子系统。 SoC可以包括包括多个第一I / O资源的第一I / O子系统和包括多个第二I / O资源的第二I / O子系统。 转向引擎可以将至少一个第一I / O资源引导到网络计算子系统或服务器计算子系统,并且可以将第二I / O资源中的至少一个引导到网络计算子系统或服务器 计算子系统。

    MULTI-MODE SYSTEM ON A CHIP
    2.
    发明申请
    MULTI-MODE SYSTEM ON A CHIP 审中-公开
    芯片上的多模式系统

    公开(公告)号:US20160239454A1

    公开(公告)日:2016-08-18

    申请号:US14622661

    申请日:2015-02-13

    CPC classification number: G06F13/4221 G06F13/385

    Abstract: A system on a chip (SoC) can be configured to operate in one of a plurality of modes. In a first mode, the SoC can be operated as a network compute subsystem to provide networking services only. In a second mode, the SoC can be operated as a server compute subsystem to provide compute services only. In a third mode, the SoC can be operated as a network compute subsystem and the server compute subsystem to provide both networking and compute services concurrently.

    Abstract translation: 可以将芯片上的系统(SoC)配置为以多种模式中的一种运行。 在第一种模式下,SoC可以作为网络计算子系统来运行,仅提供网络服务。 在第二种模式下,SoC可以作为服务器计算子系统来运行,仅提供计算服务。 在第三种模式中,SoC可以作为网络计算子系统和服务器计算子系统同时提供网络和计算服务。

    System on a chip comprising an I/O steering engine
    4.
    发明授权
    System on a chip comprising an I/O steering engine 有权
    包括I / O转向引擎的芯片上的系统

    公开(公告)号:US09588921B2

    公开(公告)日:2017-03-07

    申请号:US14623914

    申请日:2015-02-17

    CPC classification number: G06F13/364 G06F13/00 G06F13/122 G06F13/128 H04L63/00

    Abstract: Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.

    Abstract translation: 该技术的实施例可以提供一个或多个I / O资源的转向以在片上系统(SoC)上计算子系统。 SoC可以包括包括多个第一I / O资源的第一I / O子系统和包括多个第二I / O资源的第二I / O子系统。 转向引擎可以将至少一个第一I / O资源引导到网络计算子系统或服务器计算子系统,并且可以将第二I / O资源中的至少一个引导到网络计算子系统或服务器 计算子系统。

    SYSTEM ON A CHIP COMPRISING RECONFIGURABLE RESOURCES FOR MULTIPLE COMPUTE SUB-SYSTEMS
    5.
    发明申请
    SYSTEM ON A CHIP COMPRISING RECONFIGURABLE RESOURCES FOR MULTIPLE COMPUTE SUB-SYSTEMS 审中-公开
    包含多个计算机辅助系统的可重新配置资源的芯片系统

    公开(公告)号:US20160179717A1

    公开(公告)日:2016-06-23

    申请号:US14578010

    申请日:2014-12-19

    CPC classification number: G06F13/28 G06F13/4027 G06F15/7892 G06F2213/0038

    Abstract: Embodiments of the technology can provide the flexibility of fine-grained dynamic partitioning of various compute resources among different compute subsystems on an SoC. A plurality of processing cores, cache hierarchies, memory controllers and I/O resources can be dynamically partitioned between a network compute subsystem and a server compute subsystem on the SoC.

    Abstract translation: 该技术的实施例可以提供在SoC上的不同计算子系统之间的各种计算资源的细粒度动态划分的灵活性。 可以在SoC上的网络计算子系统和服务器计算子系统之间动态地划分多个处理核心,高速缓存层次结构,存储器控制器和I / O资源。

    Multi-mode system on a chip
    6.
    发明授权

    公开(公告)号:US11200192B2

    公开(公告)日:2021-12-14

    申请号:US14622661

    申请日:2015-02-13

    Abstract: A system on a chip (SoC) can be configured to operate in one of a plurality of modes. In a first mode, the SoC can be operated as a network compute subsystem to provide networking services only. In a second mode, the SoC can be operated as a server compute subsystem to provide compute services only. In a third mode, the SoC can be operated as a network compute subsystem and the server compute subsystem to provide both networking and compute services concurrently.

    Secure data processing
    7.
    发明授权

    公开(公告)号:US10956584B1

    公开(公告)日:2021-03-23

    申请号:US16141770

    申请日:2018-09-25

    Abstract: Systems and methods for performing neural network processing are provided. In one example, a system comprises a neural network processor comprising: a data decryption engine that receives encrypted data and decrypts the encrypted data, the encrypted data comprising at least one of: encrypted weights data, encrypted input data, or encrypted instruction data related to a neural network model; and a computing engine that receives the weights data and perform computations of neural network processing using the input data and the weights data and based on the instruction data.

    Systems and methods for I/O device logging

    公开(公告)号:US10067741B1

    公开(公告)日:2018-09-04

    申请号:US14562556

    申请日:2014-12-05

    Abstract: Techniques are described for logging communication traffic associated with one or more devices. For example, a system bus or other interface to a device may be monitored for traffic data elements. The traffic data elements may include, for example, transaction layer packets (TLPs) for communication across a PCI Express interface, or Ethernet packets for communication over a network. The traffic data elements can be processed by a classifier module and accordingly routed to one of a plurality of circular buffers. The circular buffers may maintain state (e.g., a head pointer and a tail pointer) that identify traffic data elements that are pending and those that are completed. Thus, the circular buffers can be inspected (such as after a crash) to determine recent activity.

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