Abstract:
Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.
Abstract:
A system on a chip (SoC) can be configured to operate in one of a plurality of modes. In a first mode, the SoC can be operated as a network compute subsystem to provide networking services only. In a second mode, the SoC can be operated as a server compute subsystem to provide compute services only. In a third mode, the SoC can be operated as a network compute subsystem and the server compute subsystem to provide both networking and compute services concurrently.
Abstract:
Embodiments can provide additional computing resources at minimal and incremental cost by providing instances of one or more server compute subsystems on a system-on-chip. The system-on-chip can include multiple compute subsystems where each compute subsystem can include dedicated processing and memory resources. The system-on-chip can also include a management compute subsystem that can manage the processing and memory resources for each subsystem.
Abstract:
Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.
Abstract:
Embodiments of the technology can provide the flexibility of fine-grained dynamic partitioning of various compute resources among different compute subsystems on an SoC. A plurality of processing cores, cache hierarchies, memory controllers and I/O resources can be dynamically partitioned between a network compute subsystem and a server compute subsystem on the SoC.
Abstract:
A system on a chip (SoC) can be configured to operate in one of a plurality of modes. In a first mode, the SoC can be operated as a network compute subsystem to provide networking services only. In a second mode, the SoC can be operated as a server compute subsystem to provide compute services only. In a third mode, the SoC can be operated as a network compute subsystem and the server compute subsystem to provide both networking and compute services concurrently.
Abstract:
Systems and methods for performing neural network processing are provided. In one example, a system comprises a neural network processor comprising: a data decryption engine that receives encrypted data and decrypts the encrypted data, the encrypted data comprising at least one of: encrypted weights data, encrypted input data, or encrypted instruction data related to a neural network model; and a computing engine that receives the weights data and perform computations of neural network processing using the input data and the weights data and based on the instruction data.
Abstract:
Embodiments can provide additional computing resources at minimal and incremental cost by providing instances of one or more server compute subsystems on a system-on-chip. The system-on-chip can include multiple compute subsystems where each compute subsystem can include dedicated processing and memory resources. The system-on-chip can also include a management compute subsystem that can manage the processing and memory resources for each subsystem.
Abstract:
Embodiments of the technology can provide the flexibility of fine-grained dynamic partitioning of various compute resources among different compute subsystems on an SoC. A plurality of processing cores, cache hierarchies, memory controllers and I/O resources can be dynamically partitioned between a network compute subsystem and a server compute subsystem on the SoC.
Abstract:
Techniques are described for logging communication traffic associated with one or more devices. For example, a system bus or other interface to a device may be monitored for traffic data elements. The traffic data elements may include, for example, transaction layer packets (TLPs) for communication across a PCI Express interface, or Ethernet packets for communication over a network. The traffic data elements can be processed by a classifier module and accordingly routed to one of a plurality of circular buffers. The circular buffers may maintain state (e.g., a head pointer and a tail pointer) that identify traffic data elements that are pending and those that are completed. Thus, the circular buffers can be inspected (such as after a crash) to determine recent activity.