公开(公告)号：US09184909B1

公开(公告)日：2015-11-10

申请号：US14594472

申请日：2015-01-12

Applicant: Analog Devices, Inc.

Inventor： Stuart McCracken ,  John Kenney ,  Kimo Tam

IPC: H04L7/04 ,  H04L7/00 ,  H04L7/02

CPC classification number: H04L7/0337 ,  H03L7/0807 ,  H03L7/0814 ,  H03L7/087 ,  H03L7/091 ,  H04L7/0008 ,  H04L7/002 ,  H04L7/0033 ,  H04L7/02 ,  H04L7/042 ,  H04L25/14

Abstract: Apparatus and methods for clock and data recovery (CDR) are provided herein. In certain configurations, a first CDR circuit captures data and edge samples from a first input data stream received over a first lane. The data and edge samples are used to generate a master phase signal, which is used to control a phase of a first data sampling clock signal used for capturing the data samples. Additionally, the first CDR circuit generates a master phase error signal based on changes to the master phase signal over time, and forwards the master phase error signal to at least a second CDR circuit. The second CDR circuit processes the master phase error signal to generate a slave phase signal used to control a phase of a second data sampling clock signal used for capturing data samples from a second input data stream received over a second lane.

Abstract translation: 本文提供了用于时钟和数据恢复（CDR）的装置和方法。 在某些配置中，第一CDR电路从在第一通道上接收的第一输入数据流捕获数据和边缘样本。 数据和边缘采样用于产生主相位信号，其用于控制​​用于捕获数据样本的第一数据采样时钟信号的相位。 此外，第一CDR电路基于随着时间的主相位信号的改变而产生主相位误差信号，并将主相位误差信号转发到至少第二CDR电路。 第二CDR电路处理主相位误差信号以产生用于控制用于从通过第二通道接收的第二输入数据流捕获数据样本的第二数据采样时钟信号的相位的从相信号。

公开(公告)号：US09099976B2

公开(公告)日：2015-08-04

申请号：US14047293

申请日：2013-10-07

Applicant: ANALOG DEVICES, INC.

Inventor： Pablo Acosta-Serafini ,  Kimo Tam ,  Stuart McCracken ,  Daniel Mulcahy

IPC: H03G3/20 ,  H03G3/30 ,  H04L25/03

CPC classification number: H03G3/30 ,  H03G3/3052 ,  H03G3/3078 ,  H04L25/03878

Abstract: Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.

Abstract translation: 公开了诸如涉及接收机设备的装置和方法。 一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。 均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。 增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。

公开(公告)号：US20140037031A1

公开(公告)日：2014-02-06

申请号：US14047293

申请日：2013-10-07

Applicant: ANALOG DEVICES, INC.

Inventor： Pablo Acosta-Serafini ,  Kimo Tam ,  Stuart McCracken ,  Daniel Mulcahy

IPC: H03G3/30

CPC classification number: H03G3/30 ,  H03G3/3052 ,  H03G3/3078 ,  H04L25/03878

Abstract: Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.

Abstract translation: 公开了诸如涉及接收机设备的装置和方法。 一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。 均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。 增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。