公开(公告)号：US09698967B2

公开(公告)日：2017-07-04

申请号：US14851290

申请日：2015-09-11

Applicant: Apple Inc.

Inventor： Bo Tang ,  Abhijit D. Choudhury

IPC: H04L7/00 ,  G06F5/06 ,  G06F1/32 ,  G11C11/4076 ,  H04L12/863 ,  G11C7/22

CPC classification number: G06F5/06 ,  G06F1/324 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  G11C11/4076 ,  H04L5/00 ,  H04L7/0008 ,  H04L7/0012 ,  H04L45/24 ,  H04L47/622

Abstract: A dual path source synchronous interface is disclosed. In one embodiment, a source synchronous interface includes a transmitter coupled to serially receive data from a first functional circuit block, and a receiver coupled to provide data serially to a second functional circuit block. Data is conveyed to the transmitter on a single signal line, and similarly, from the receiver on another single signal line. The transmitter is coupled to the receiver by two signal lines. The serial data received by the transmitter may be separated into two streams of alternating bits, e.g., a first bit is transmitted on one signal line, the next bit is transmitted on the other signal line, and so forth. At the receiver, the alternating bit streams may be re-combined into a single bit stream for transfer to the second functional circuit.

公开(公告)号：US20170078080A1

公开(公告)日：2017-03-16

申请号：US14851290

申请日：2015-09-11

Applicant: Apple Inc.

Inventor： Bo Tang ,  Abhijit D. Choudhury

IPC: H04L7/00 ,  H04L12/863 ,  G11C11/4076

CPC classification number: G06F5/06 ,  G06F1/324 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  G11C11/4076 ,  H04L5/00 ,  H04L7/0008 ,  H04L7/0012 ,  H04L45/24 ,  H04L47/622

Abstract: A dual path source synchronous interface is disclosed. In one embodiment, a source synchronous interface includes a transmitter coupled to serially receive data from a first functional circuit block, and a receiver coupled to provide data serially to a second functional circuit block. Data is conveyed to the transmitter on a single signal line, and similarly, from the receiver on another single signal line. The transmitter is coupled to the receiver by two signal lines. The serial data received by the transmitter may be separated into two streams of alternating bits, e.g., a first bit is transmitted on one signal line, the next bit is transmitted on the other signal line, and so forth. At the receiver, the alternating bit streams may be re-combined into a single bit stream for transfer to the second functional circuit.

Abstract translation: 公开了一种双路径源同步接口。 在一个实施例中，源同步接口包括被耦合以串行地从第一功能电路块接收数据的发射器和被连接以提供数据到第二功能电路块的接收器。 在单个信号线上将数据传送到发射机，类似地，从另一个信号线上的接收机传送。 发射机通过两条信号线耦合到接收机。 由发射机接收的串行数据可以被分成两个交替比特流，例如，在一个信号线上发送第一比特，另一个信号线上发送下一个比特，等等。 在接收机处，交替的比特流可以被重新组合成单​​个比特流以传送到第二功能电路。