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公开(公告)号:US11475944B2
公开(公告)日:2022-10-18
申请号:US17107559
申请日:2020-11-30
Applicant: Arm Limited
Inventor: Rahul Mathur , Vivek Asthana , Ankur Garcia Goel , Nikhil Kaushik , Rachit Ahuja , Bikas Maiti , Yew Keong Chong
IPC: G11C11/419 , G11C11/418
Abstract: Various implementations described herein are directed to an integrated circuit having a wordline driver coupled to a bitcell via a wordline. The integrated circuit may include a read assist transistor coupled to the wordline between the wordline driver and the bitcell. While activated, the read assist transistor may generate an adaptive underdrive on the wordline, the level of which depends on the process, temperature and voltage of operation of the memory, when the wordline is selected and driven by the wordline driver.
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公开(公告)号:US10854280B2
公开(公告)日:2020-12-01
申请号:US15691001
申请日:2017-08-30
Applicant: ARM Limited
Inventor: Abhairaj Singh , Vivek Asthana , Monu Rathore , Ankur Goel , Nikhil Kaushik , Rachit Ahuja , Rahul Mathur , Bikas Maiti , Yew Keong Chong
IPC: G11C11/408 , G11C11/419 , G11C11/418
Abstract: Various implementations described herein are directed to an integrated circuit having a wordline driver coupled to a bitcell via a wordline. The integrated circuit may include a read assist transistor coupled to the wordline between the wordline driver and the bitcell. While activated, the read assist transistor may generate an adaptive underdrive on the wordline, the level of which depends on the process, temperature and voltage of operation of the memory, when the wordline is selected and driven by the wordline driver.
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公开(公告)号:US20190066769A1
公开(公告)日:2019-02-28
申请号:US15690562
申请日:2017-08-30
Applicant: ARM Limited
Inventor: Vivek Asthana , Nitin Jindal , Nikhil Kaushik , Kapil Mittal , Divyank Gupta , Shakir Malik , Stefi Bhavsar
IPC: G11C11/418 , H01L27/11
Abstract: Various implementations described herein are directed to an integrated circuit. The integrated circuit may include dummy wordline circuitry having a dummy wordline driver coupled to a dummy wordline load via a dummy wordline. The integrated circuit may include underdrive circuitry coupled to the dummy wordline between the dummy wordline driver and the dummy wordline load. The underdrive circuitry may generate an underdrive on the dummy wordline when the dummy wordline is selected and driven by the dummy wordline driver.
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公开(公告)号:US10217506B1
公开(公告)日:2019-02-26
申请号:US15690562
申请日:2017-08-30
Applicant: ARM Limited
Inventor: Vivek Asthana , Nitin Jindal , Nikhil Kaushik , Kapil Mittal , Divyank Gupta , Shakir Malik , Stefi Bhavsar
IPC: G11C11/418 , H01L27/11 , G11C11/419 , H01L21/8238
Abstract: Various implementations described herein are directed to an integrated circuit. The integrated circuit may include dummy wordline circuitry having a dummy wordline driver coupled to a dummy wordline load via a dummy wordline. The integrated circuit may include underdrive circuitry coupled to the dummy wordline between the dummy wordline driver and the dummy wordline load. The underdrive circuitry may generate an underdrive on the dummy wordline when the dummy wordline is selected and driven by the dummy wordline driver.
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公开(公告)号:US20210082496A1
公开(公告)日:2021-03-18
申请号:US17107559
申请日:2020-11-30
Applicant: Arm Limited
Inventor: Rahul Mathur , Vivek Asthana , Ankur Garcia Goel , Nikhil Kaushik , Rachit Ahuja , Bikas Maiti , Yew Keong Chong
IPC: G11C11/419 , G11C11/418
Abstract: Various implementations described herein are directed to an integrated circuit having a wordline driver coupled to a bitcell via a wordline. The integrated circuit may include a read assist transistor coupled to the wordline between the wordline driver and the bitcell. While activated, the read assist transistor may generate an adaptive underdrive on the wordline, the level of which depends on the process, temperature and voltage of operation of the memory, when the wordline is selected and driven by the wordline driver.
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公开(公告)号:US20190066772A1
公开(公告)日:2019-02-28
申请号:US15691001
申请日:2017-08-30
Applicant: ARM Limited
Inventor: Abhairaj Singh , Vivek Asthana , Monu Rathore , Ankur Goel , Nikhil Kaushik , Rachit Ahuja , Rahul Mathur , Bikas Maiti , Yew Keong Chong
IPC: G11C11/419
Abstract: Various implementations described herein are directed to an integrated circuit having a wordline driver coupled to a bitcell via a wordline. The integrated circuit may include a read assist transistor coupled to the wordline between the wordline driver and the bitcell. While activated, the read assist transistor may generate an adaptive underdrive on the wordline, the level of which depends on the process, temperature and voltage of operation of the memory, when the wordline is selected and driven by the wordline driver.
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