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公开(公告)号:US20190237135A1
公开(公告)日:2019-08-01
申请号:US15886630
申请日:2018-02-01
申请人: Arm Limited
发明人: Arjunesh Namboothiri Madhavan , Akash Bangalore Srinivasa , Sujit Kumar Rout , Vikash , Gaurav Rattan Singla , Vivek Nautiyal , Shri Sagar Dwivedi , Jitendra Dasani , Lalit Gupta
CPC分类号: G11C11/419 , G11C7/1096 , G11C7/12 , G11C7/18 , G11C8/16 , H01L27/1116 , H01L29/94
摘要: Various implementations described herein are directed to an integrated circuit having memory circuitry with an array of bitcells. The integrated circuit may include read-write circuitry that is coupled to the memory circuitry to perform read operations and write operations for the array of bitcells. The integrated circuit may include write assist circuitry that is coupled to the memory circuitry and the read-write circuitry. The write assist circuitry may receive a control signal from the read-write circuitry. Further, the write assist circuitry may sense write operations based on the control signal and may drive the write operations for the array of bitcells.
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公开(公告)号:US11043262B2
公开(公告)日:2021-06-22
申请号:US15886630
申请日:2018-02-01
申请人: Arm Limited
发明人: Arjunesh Namboothiri Madhavan , Akash Bangalore Srinivasa , Sujit Kumar Rout , Vikash , Gaurav Rattan Singla , Vivek Nautiyal , Shri Sagar Dwivedi , Jitendra Dasani , Lalit Gupta
摘要: Various implementations described herein are directed to an integrated circuit having memory circuitry with an array of bitcells. The integrated circuit may include read-write circuitry that is coupled to the memory circuitry to perform read operations and write operations for the array of bitcells. The integrated circuit may include write assist circuitry that is coupled to the memory circuitry and the read-write circuitry. The write assist circuitry may receive a control signal from the read-write circuitry. Further, the write assist circuitry may sense write operations based on the control signal and may drive the write operations for the array of bitcells.
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