公开(公告)号：US07703993B1

公开(公告)日：2010-04-27

申请号：US12337533

申请日：2008-12-17

申请人： Artur Darbinyan ,  Luu Nguyen ,  Anindya Poddar

发明人： Artur Darbinyan ,  Luu Nguyen ,  Anindya Poddar

IPC分类号： G02B6/36

CPC分类号： G02B6/4214 ,  G02B6/4232

摘要： Optoelectronic packages and wafer level techniques for forming optoelectronic packages are described. In accordance with one apparatus aspect of the invention, a pair of substrates are bonded together to form an optical coupler. A first one of the substrates has a recess that faces the second substrate to at least in part define a channel suitable for receiving an optical transmission medium. A photonic device is mounted on a mounting surface of the second substrate that is opposite its bonded surface. The photonic device faces the reflective surface and an optical path is formed between the channel and the photonic element that both reflects off of the reflective surface and passes through the second substrate. In some embodiments an integrated circuit device and/or solder bumps are also attached to the mounting surface and the second substrate has conductive traces thereon that electrically couple the various electrical components as appropriate (e.g., the photonic device, the integrated circuit device, the solder bumps and/or other components). The substrates may be formed from a wide variety of materials including, glass, plastic and silicon. In some embodiments, at least the second substrate is formed from an optically transparent material and the optical path passes directly though the optically transparent material. In a method aspect of the invention, a variety of wafer level methods for forming such devices are described.

摘要翻译： 描述了用于形成光电封装的光电封装和晶片级技术。 根据本发明的一个装置方面，一对基板结合在一起以形成光耦合器。 基板中的第一个具有面向第二基板的至少部分地限定适于接收光传输介质的通道的凹槽。 光子器件安装在第二衬底的与其接合表面相对的安装表面上。 光子器件面向反射表面，并且在通道和光子元件之间形成光路，两者都从反射表面反射并穿过第二衬底。 在一些实施例中，集成电路器件和/或焊料凸块也附接到安装表面，并且第二衬底在其上具有导电迹线，其上适当地电耦合各种电气部件（例如，光子器件，集成电路器件，焊料 凸块和/或其他部件）。 基板可以由各种各样的材料形成，包括玻璃，塑料和硅。 在一些实施例中，至少第二衬底由光学透明材料形成，并且光路直接通过光学透明材料。 在本发明的方法方面，描述了用于形成这种装置的各种晶片级方法。

公开(公告)号：US08650748B2

公开(公告)日：2014-02-18

申请号：US13106383

申请日：2011-05-12

申请人： Artur Darbinyan ,  David T. Chin ,  Kurt E. Sincerbox

发明人： Artur Darbinyan ,  David T. Chin ,  Kurt E. Sincerbox

IPC分类号： H05K3/30

CPC分类号： H01L21/486 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K3/4046 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49789 ,  Y10T29/49798 ,  Y10T29/53174 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of fabricating chip carriers suitable for use in packaging integrated circuits and other electronic, electro-mechanical and opto-electronic devices is described. In general, a number of wires (or wires and rods) are arranged in parallel in a wiring fixture. After the wires are positioned, they are encapsulated to form an encapsulated wiring block. The wiring block is then sliced to form a number of discrete panels. Preferably, the various wires are geometrically positioned such that each resulting panel has a large number of device areas defined therein. The encapsulant in each panel effectively forms a substrate and the wire segments in each panel form conductive vias that extend through the substrate. The resulting panels/chip carriers can then be used in a wide variety of packaging applications.

摘要翻译： 描述了适用于封装集成电路和其他电子，机电和光电子器件的芯片载体的制造方法。 通常，在配线夹具中并列布置有多根线（或线和杆）。 电线定位后，将其封装形成封装的接线块。 然后将接线块切片以形成多个离散面板。 优选地，各种导线几何地定位成使得每个所得到的面板具有限定在其中的大量设备区域。 每个面板中的密封剂有效地形成衬底，并且每个面板中的线段形成延伸穿过衬底的导电通路。 所得到的面板/芯片载体然后可用于各种各样的包装应用中。