公开(公告)号：US08445983B2

公开(公告)日：2013-05-21

申请号：US13136004

申请日：2011-07-20

申请人： Atsushi Iwasaki ,  Hiroaki Takasu

发明人： Atsushi Iwasaki ,  Hiroaki Takasu

IPC分类号： H01L27/14

CPC分类号： H01L27/14689 ,  H01L27/1463 ,  H01L27/14643

摘要： A semiconductor device for performing photoelectric conversion of incident light includes a substrate and a well region having different conductivity types. A depletion layer is generated in a vicinity of a junction interface between the substrate and the well region. A first trench has a depth equal to a height up to a top portion of the depletion layer generated on a bottom side of the well region and a width extending to a heavily doped region formed in the well region. A second trench has a depth larger than that of a portion of the depletion layer generated on the bottom side of the well region and a width larger than that of portions of the depletion layer generated on the sides of the well region. The second trench surrounds the first trench so as to confine the depletion layer under the first trench except for a region thereof under the heavily doped region. An insulator is buried into each the first trench and the second trench.

摘要翻译： 用于进行入射光的光电转换的半导体器件包括基板和具有不同导电类型的阱区域。 在衬底和阱区之间的接合界面附近产生耗尽层。 第一沟槽的深度等于在阱区的底侧上产生的耗尽层的顶部的高度，以及延伸到在阱区中形成的重掺杂区的宽度。 第二沟槽的深度大于在阱区底部产生的耗尽层的一部分的深度，并且其宽度大于在阱区域的侧面上产生的耗尽层的部分的宽度。 第二沟槽围绕第一沟槽，以将耗尽层限制在第一沟槽之下，除了在重掺杂区域之下的区域之外。 绝缘体被埋入每个第一沟槽和第二沟槽中。

公开(公告)号：US20110278686A1

公开(公告)日：2011-11-17

申请号：US13136004

申请日：2011-07-20

申请人： Atsushi Iwasaki ,  Hiroaki Takasu

发明人： Atsushi Iwasaki ,  Hiroaki Takasu

IPC分类号： H01L31/0216

CPC分类号： H01L27/14689 ,  H01L27/1463 ,  H01L27/14643

摘要： Provided is a semiconductor device for performing photoelectric conversion of incident light, including: a p-type substrate (1), an n-type well (2) having a predetermined depth and formed in a predetermined region of the p-type substrate (1), and a depletion layer generated at a junction interface between the p-type substrate (1) and the n-type well (2). In the trenches (22) having a depth larger than that of a depletion layer (K1) generated on a bottom side of the n-type well (2) and a width larger than that of depletion layers (K2, K3) generated on sides of the n-type well (2) are provided so as to remove junction interfaces (J2, J3) on the sides of the n-type well (2), and an insulating layer (21) is buried in the trenches (22).

摘要翻译： 提供一种用于进行入射光的光电转换的半导体器件，包括：p型衬底（1），具有预定深度并形成在p型衬底（1）的预定区域中的n型阱（2） ）和在p型衬底（1）和n型阱（2）之间的结界面处产生的耗尽层。 在深度大于在n型阱（2）的底侧产生的耗尽层（K1）的深度的沟槽（22）中，并且宽度大于在侧面产生的耗尽层（K2，K3）的宽度 提供n型阱（2）以便去除n型阱（2）侧面上的结界面（J2，J3），并且绝缘层（21）被埋在沟槽（22）中， 。

公开(公告)号：US08022492B2

公开(公告)日：2011-09-20

申请号：US11709496

申请日：2007-02-22

申请人： Atsushi Iwasaki ,  Hiroaki Takasu

发明人： Atsushi Iwasaki ,  Hiroaki Takasu

IPC分类号： H01L27/14

CPC分类号： H01L27/14689 ,  H01L27/1463 ,  H01L27/14643

摘要： A semiconductor device for performing photoelectric conversion has a semiconductor substrate of a first conductivity type and a well region of a second conductivity type different from the first conductivity type and formed in a predetermined region of the semiconductor substrate. A pair of trenches are formed directly adjacent to respective opposite sides of the well region and have widths greater than those of respective depletion layers generated on the respective opposite sides so as to remove junction interfaces on the respective opposite sides. A depth of each trench from a surface of the semiconductor substrate is greater than that of a depletion layer generated on a bottom side of the well region. An insulating layer is buried in each of the trenches.

摘要翻译： 用于进行光电转换的半导体器件具有第一导电类型的半导体衬底和不同于第一导电类型的第二导电类型的阱区，并且形成在半导体衬底的预定区域中。 一对沟槽直接邻近阱区的相对侧而形成，并且具有大于在各个相对侧上产生的相应耗尽层的宽度的宽度，以便去除相应相对侧上的结界面。 来自半导体衬底的表面的每个沟槽的深度大于在阱区的底侧上产生的耗尽层的深度。 绝缘层被埋在每个沟槽中。

公开(公告)号：US20070200189A1

公开(公告)日：2007-08-30

申请号：US11709496

申请日：2007-02-22

申请人： Atsushi Iwasaki ,  Hiroaki Takasu

发明人： Atsushi Iwasaki ,  Hiroaki Takasu

IPC分类号： H01L27/14

CPC分类号： H01L27/14689 ,  H01L27/1463 ,  H01L27/14643

摘要： Provided is a semiconductor device for performing photoelectric conversion of incident light, including: a p-type substrate (1), an n-type well (2) having a predetermined depth and formed in a predetermined region of the p-type substrate (1), and a depletion layer generated at a junction interface between the p-type substrate (1) and the n-type well (2). In the trenches (22) having a depth larger than that of a depletion layer (K1) generated on a bottom side of the n-type well (2) and a width larger than that of depletion layers (K2, K3) generated on sides of the n-type well (2) are provided so as to remove junction interfaces (J2, J3) on the sides of the n-type well (2), and an insulating layer (21) is buried in the trenches (22).

摘要翻译： 提供一种用于进行入射光的光电转换的半导体器件，包括：p型衬底（1），具有预定深度并形成在p型衬底（1）的预定区域中的n型阱（2） ）和在p型衬底（1）和n型阱（2）之间的结界面处产生的耗尽层。 在沟槽（22）中，其深度大于在n型阱（2）的底侧上产生的耗尽层（K L1）的深度，并且其宽度大于耗尽层的宽度 提供在n型阱（2）的侧面上产生的（K 2 N 3，K 3 N），以便去除接合界面（J 2 （2）的侧面上，并且绝缘层（21）被埋在沟槽（22）中。

公开(公告)号：US08450799B2

公开(公告)日：2013-05-28

申请号：US11975923

申请日：2007-10-22

申请人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

发明人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

IPC分类号： H01L29/34

CPC分类号： H01L29/78615 ,  H01L29/66772

摘要： A field effect transistor has an insulating substrate, a semiconductor thin film formed on the insulating substrate, and a gate insulating film on the semiconductor thin film. A first gate electrode is formed on the gate insulating film. A first region and a second region having a first conductivity type are formed on or in a surface of the semiconductor film on opposite sides of the first gate electrode in a length direction thereof. A third region having a second conductivity type opposite the first conductivity type is arranged on or in the semiconductor film side by side with the second region in a width direction of the first gate electrode. The third region and the second region are in contact with each other and make a low resistance junction. A second gate electrode is formed on the gate insulating film along the second region. A fourth region having the first conductivity type is formed on or in the semiconductor film on an opposite side of the second region with respect to the second gate electrode. One of the first and the fourth regions is used as an output region according to a circuit operation.

公开(公告)号：US08283725B2

公开(公告)日：2012-10-09

申请号：US12191674

申请日：2008-08-14

申请人： Hiroaki Takasu

发明人： Hiroaki Takasu

IPC分类号： H01L23/62

CPC分类号： H01L29/0646 ,  H01L21/823418 ,  H01L27/0266 ,  H01L29/78

摘要： In a semiconductor device including an n-type metal oxide semiconductor transistor for electrostatic discharge protection surrounded by a shallow trench for device isolation, in order to suppress the off-leak current in an off state, there is formed, in the vicinity of the drain region of the NMOS transistor for ESD protection, an n-type region receiving a signal from an external connection terminal via a p-type region in contact with the drain region of the NMOS transistor for ESD protection.

摘要翻译： 在包括由用于器件隔离的浅沟槽围绕的用于静电放电保护的n型金属氧化物半导体晶体管的半导体器件中，为了抑制处于断开状态的漏电流，在漏极附近形成 用于ESD保护的NMOS晶体管的区域，n型区域，经由与用于ESD保护的NMOS晶体管的漏极区域接触的p型区域从外部连接端子接收信号。

公开(公告)号：US20120168844A1

公开(公告)日：2012-07-05

申请号：US13374281

申请日：2011-12-20

申请人： Hiroaki Takasu

发明人： Hiroaki Takasu

IPC分类号： H01L29/788

CPC分类号： H01L29/7883 ,  H01L29/42324

摘要： Provided is an electrically erasable and programmable nonvolatile semiconductor memory device having a tunnel region; the tunnel region and the peripheral of the tunnel region are dug down to be made lower, and a depletion electrode, to which an arbitral potential is given to deplete a part of the tunnel region through a depletion electrode insulating film, is arranged in the lowered drain region.

摘要翻译： 提供了具有隧道区域的电可擦除和可编程的非易失性半导体存储器件; 隧道区域和隧道区域的周边被挖掘下来，并且通过耗尽电极绝缘膜将给予仲裁电位以耗尽隧道区域的一部分的耗尽电极布置在下降的 漏区。

公开(公告)号：US20090050967A1

公开(公告)日：2009-02-26

申请号：US12191674

申请日：2008-08-14

申请人： Hiroaki Takasu

发明人： Hiroaki Takasu

IPC分类号： H01L29/78

CPC分类号： H01L29/0646 ,  H01L21/823418 ,  H01L27/0266 ,  H01L29/78

摘要： In a semiconductor device including an n-type metal oxide semiconductor transistor for electrostatic discharge protection surrounded by a shallow trench for device isolation, in order to suppress the off-leak current in an off state, there is formed, in the vicinity of the drain region of the NMOS transistor for ESD protection, an n-type region receiving a signal from an external connection terminal via a p-type region in contact with the drain region of the NMOS transistor for ESD protection.

摘要翻译： 在包括由用于器件隔离的浅沟槽围绕的用于静电放电保护的n型金属氧化物半导体晶体管的半导体器件中，为了抑制处于断开状态的漏电流，在漏极附近形成 用于ESD保护的NMOS晶体管的区域，n型区域，经由与用于ESD保护的NMOS晶体管的漏极区域接触的p型区域从外部连接端子接收信号。

公开(公告)号：US20080150068A1

公开(公告)日：2008-06-26

申请号：US12004152

申请日：2007-12-19

申请人： Hiroaki Takasu

发明人： Hiroaki Takasu

IPC分类号： H01L31/0232

CPC分类号： H01L27/14601 ,  H01L27/14621

摘要： Polycrystalline silicon thin films are each fixed to the same potential and are each formed under the protective film of each of a plurality of pixel regions for receiving red light, a plurality of pixel regions for receiving green light, and a plurality of pixel regions for receiving blue light, and each polycrystalline silicon thin films has a different thickness for selectively transmitting a received light wavelength of each of the plurality of pixel regions for receiving red light, the plurality of pixel regions for receiving green light, and the plurality of pixel regions for receiving blue light to function as a color filter. The color filter can be formed during an IC manufacturing process while the color filter is positioned to align with the pixel region serving as a light receiving element, with higher precision.

摘要翻译： 多晶硅薄膜各自固定成相同的电位，并且各自形成在用于接收红光的多个像素区域中的每一个的保护膜下方，用于接收绿光的多个像素区域和用于接收的多个像素区域 蓝色光，并且每个多晶硅薄膜具有不同的厚度，用于选择性地透射用于接收红光的多个像素区域中的每一个的接收光波长，用于接收绿光的多个像素区域和用于接收绿光的多个像素区域 接收蓝光以用作滤色器。 可以在IC制造过程中形成滤色器，同时以更高的精度将滤色器定位成与用作光接收元件的像素区域对准。

公开(公告)号：US07282763B2

公开(公告)日：2007-10-16

申请号：US10228847

申请日：2002-08-27

申请人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

发明人： Yutaka Hayashi ,  Hisashi Hasegawa ,  Hiroaki Takasu ,  Jun Osanai

IPC分类号： H01L29/94

CPC分类号： H01L29/78615 ,  H01L29/42384 ,  H01L29/78645

摘要： A field effect transistor has an insulating substrate, a semiconductor thin film formed on the insulating substrate, and a gate insulating film formed on the semiconductor thin film. A first gate electrode is formed on the gate insulating film. A first region and a second region having a first conductivity type are formed on or in a surface of the semiconductor thin film on opposite sides of the first gate electrode in a length direction thereof. A third region having a second conductivity type opposite the first conductivity type is arranged on or in the semiconductor film side by side with the second region in a width direction of the first gate electrode. A conductive thin film is connected with the second region and the third region. A second gate electrode is formed on the gate insulating film along the second region. A fourth region having the first conductivity type is formed on or in the semiconductor film on an opposite side of the second region with respect to the second gate electrode. One of the first and the fourth regions is used as an output region according to a circuit operation and without application of a fixed bias potential to the third region.

摘要翻译： 场效应晶体管具有绝缘基板，形成在绝缘基板上的半导体薄膜和形成在半导体薄膜上的栅极绝缘膜。 在栅极绝缘膜上形成第一栅电极。 在第一栅电极的长度方向的相对侧的半导体薄膜的表面上或表面上形成具有第一导电类型的第一区域和第二区域。 具有与第一导电类型相反的第二导电类型的第三区域与第一栅电极的宽度方向上的第二区域并排设置在半导体膜上或半导体膜中。 导电薄膜与第二区域和第三区域连接。 第二栅电极沿着第二区形成在栅极绝缘膜上。 具有第一导电类型的第四区域形成在第二区域的相对于第二栅电极的相反侧上或半导体膜中。 根据电路操作将第一和第四区域中的一个用作输出区域，并且不向第三区域施加固定的偏置电位。