Low swap circuit card design for RF power amplifiers

    公开(公告)号:US10700649B2

    公开(公告)日:2020-06-30

    申请号:US16130155

    申请日:2018-09-13

    Abstract: A system and method for using an embedded microprocessor in an RF amplifier. The use of an embedded microprocessor avoids manual calibration. The Microprocessor collects initial amplifier performance data based on a set of parameters and calculates the needed corrections. The microprocessor can change levels within the circuit to achieve those operating points. The embedded microprocessor sets voltage levels with internal circuitry and communicates this information externally through a serial communication port, or the like, to allow a user to communicate with and look at the amplifier data and readjust the internal bias levels, as needed. Thus, the internal microprocessor provides for calibration, self-testing, and monitoring of the RF amplifier and also functions as an in situ bias and temperature compensation controller for use in the presence of temperature variation and provides bias sequencing control to protect against improper applied timing of voltage inputs to the amplifier.

    Ultra-wideband high power amplifier architecture
    2.
    发明授权
    Ultra-wideband high power amplifier architecture 有权
    超宽带高功率放大器架构

    公开(公告)号:US08989683B2

    公开(公告)日:2015-03-24

    申请号:US13833653

    申请日:2013-03-15

    CPC classification number: H03G3/3042 H03F3/24 H03F3/602

    Abstract: Techniques and architecture are disclosed for providing an ultra-wideband, multi-channel solid-state power amplifier architecture. In some embodiments, the architecture includes a power divider which splits an input signal and delivers that split signal to a plurality of downstream channel chipsets. Each channel chipset is configured to amplify a sub-band of the original full-band input signal and to provide the resultant amplified sub-band for downstream use, such as for transmission by an antenna operatively coupled with that channel. In the aggregate, the amplified sub-bands provide coverage of the same ultra-wideband frequency range of the original input signal, in some cases. In some embodiments, the architecture provides high radio frequency (RF) power with good amplifying efficiency and ultra-wide instantaneous frequency bandwidth performance in a small-form-factor package. In some instances, control circuitry is provided to control which chipset die(s) are enabled/disabled, thus providing control over gain and power levels of the output signal(s).

    Abstract translation: 公开了用于提供超宽带多通道固态功率放大器架构的技术和架构。 在一些实施例中,该架构包括功率分配器,其分割输入信号并将该分离信号传送到多个下游信道芯片组。 每个通道芯片组被配置为放大原始全频带输入信号的子带,并且为下游使用提供所得到的放大子带,例如用于与该信道可操作地耦合的天线的传输。 总之,在某些情况下,放大的子带提供了与原始输入信号相同的超宽带频率范围的覆盖。 在一些实施例中,该体系结构提供具有良好的放大效率和超小型瞬时频率带宽性能的高射频(RF)功率。 在一些情况下,提供控制电路以控制哪个芯片组管芯被启用/禁用,从而提供对输出信号的增益和功率电平的控制。

    ULTRA-WIDEBAND HIGH POWER AMPLIFIER ARCHITECTURE
    3.
    发明申请
    ULTRA-WIDEBAND HIGH POWER AMPLIFIER ARCHITECTURE 有权
    超宽带大功率放大器架构

    公开(公告)号:US20130260703A1

    公开(公告)日:2013-10-03

    申请号:US13833653

    申请日:2013-03-15

    CPC classification number: H03G3/3042 H03F3/24 H03F3/602

    Abstract: Techniques and architecture are disclosed for providing an ultra-wideband, multi-channel solid-state power amplifier architecture. In some embodiments, the architecture includes a power divider which splits an input signal and delivers that split signal to a plurality of downstream channel chipsets. Each channel chipset is configured to amplify a sub-band of the original full-band input signal and to provide the resultant amplified sub-band for downstream use, such as for transmission by an antenna operatively coupled with that channel. In the aggregate, the amplified sub-bands provide coverage of the same ultra-wideband frequency range of the original input signal, in some cases. In some embodiments, the architecture provides high radio frequency (RF) power with good amplifying efficiency and ultra-wide instantaneous frequency bandwidth performance in a small-form-factor package. In some instances, control circuitry is provided to control which chipset die(s) are enabled/disabled, thus providing control over gain and power levels of the output signal(s).

    Abstract translation: 公开了用于提供超宽带多通道固态功率放大器架构的技术和架构。 在一些实施例中,该架构包括功率分配器,其分割输入信号并将该分离信号传送到多个下游信道芯片组。 每个通道芯片组被配置为放大原始全频带输入信号的子带,并且为下游使用提供所得到的放大子带,例如用于与该信道可操作地耦合的天线的传输。 总之,在某些情况下,放大的子带提供了与原始输入信号相同的超宽带频率范围的覆盖。 在一些实施例中,该体系结构提供具有良好的放大效率和超小型瞬时频率带宽性能的高射频(RF)功率。 在一些情况下,提供控制电路以控制哪个芯片组管芯被启用/禁用,从而提供对输出信号的增益和功率电平的控制。

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