公开(公告)号：US10700649B2

公开(公告)日：2020-06-30

申请号：US16130155

申请日：2018-09-13

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Frank A. Mannarino ,  Robert Actis ,  Robert C. Marion ,  John R. Muir ,  Steven Rajkowski ,  Eldon M. Sutphin

IPC: H03F3/195 ,  H03F1/02 ,  H03F1/30 ,  H03G3/30 ,  H03F3/213

Abstract: A system and method for using an embedded microprocessor in an RF amplifier. The use of an embedded microprocessor avoids manual calibration. The Microprocessor collects initial amplifier performance data based on a set of parameters and calculates the needed corrections. The microprocessor can change levels within the circuit to achieve those operating points. The embedded microprocessor sets voltage levels with internal circuitry and communicates this information externally through a serial communication port, or the like, to allow a user to communicate with and look at the amplifier data and readjust the internal bias levels, as needed. Thus, the internal microprocessor provides for calibration, self-testing, and monitoring of the RF amplifier and also functions as an in situ bias and temperature compensation controller for use in the presence of temperature variation and provides bias sequencing control to protect against improper applied timing of voltage inputs to the amplifier.

公开(公告)号：US09742445B1

公开(公告)日：2017-08-22

申请号：US15200204

申请日：2016-07-01

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Robert Actis ,  Robert J. Lender, Jr. ,  Jared P. Majcher ,  John R. Muir ,  Edwin C. Powers

IPC: H01Q11/12 ,  H04B1/04 ,  H03F3/19 ,  H01L25/065 ,  H01L23/66 ,  H01L23/00 ,  H03F3/21 ,  H01L23/367 ,  H01L23/373 ,  H01L23/02

CPC classification number: H04B1/04 ,  H01L23/02 ,  H01L23/3675 ,  H01L23/3732 ,  H01L23/3736 ,  H01L23/66 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0655 ,  H01L2223/6644 ,  H01L2223/6683 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32245 ,  H01L2224/32502 ,  H01L2224/83101 ,  H01L2224/83447 ,  H01L2224/83805 ,  H01L2924/01006 ,  H01L2924/01042 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/1033 ,  H01L2924/1423 ,  H01L2924/1426 ,  H01L2924/15747 ,  H03F3/19 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F3/68 ,  H03F2200/111 ,  H03F2200/411 ,  H03F2200/429 ,  H03F2200/451 ,  H03F2200/552 ,  H03F2203/21106 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/0105

Abstract: A solid-state amplifier architecture is disclosed. In some embodiments, the disclosed architecture may include first and second channel chipsets configured to amplify either the entire instantaneous frequency band of a radio frequency (RF) input signal or, respectively, sub-bands thereof, which may be divided proportionally between the two chipsets. In some cases, the chipsets may be configured to amplify frequencies in excess of the entire K-band and Ka-band frequencies simultaneously. In some cases, the architecture may be configured to address a signal received, for instance, from an electronic warfare (EW) system to a log amplifier stage configured to output a signal to the EW system, in response to which the EW system may generate a RF signal for amplification by the architecture for transmission. To facilitate heat dissipation, the architecture may be coupled, in part or in whole, with a thermally conductive carrier, optionally with an intervening diamond heat spreader layer.