Abstract:
The present invention provides a pixel driving circuit and a driving method thereof, and a display device. The pixel driving circuit is used for driving a pixel array, wherein each pixel in the pixel array comprises four sub-pixels with different colors, and wherein the pixel driving circuit comprises: at least one first sub-pixel driving chip and at least one second sub-pixel driving chip, wherein the at least one first sub-pixel driving chip each is connected to a part of sub-pixels corresponding thereto in corresponding pixels to drive them, and the at least one second sub-pixel driving chip each is connected to the other part of sub-pixels corresponding thereto in the corresponding pixels to drive them. In the invention, noise interference can be avoided, and the display quality is improved; the cost is reduced; signal transmitting efficiency is increased and the EMI characteristic of products is improved.
Abstract:
The present invention discloses a display device comprising the structure. The pixel structure comprises multiple pixel units arranged in a matrix form, and multiple gate lines and data lines for providing drive to the multiple pixel units, wherein the multiple pixel units are scanned progressively in unit of L rows; the L rows of pixel units being simultaneously scanned among the plurality of pixel units are configured as a pixel block; and at least two adjacent rows of pixel units in the L rows of pixel units being used for displaying different images, wherein L≧3. By adopting the pixel structure, the problems of undercharge of a storing capacitor Cs and RC delay of the data lines are alleviated, thus the display uniformity and the display quality of the display device is ensured. The pixel structure is particularly suitable to a large-size ultra-high-resolution display device.
Abstract:
The present disclosure provides a data driving circuit and a driving method thereof, a data driving system and a display device. In an embodiment of a data driving circuit, each digital to analog conversion unit is only used for driving sub-pixels of one color, and by controlling on-off of the switch unit, one data line interface unit is enabled to be connected to different digital to analog conversion units when driving sub-pixels of different colors. In this way, a reference voltage can be provided to the digital to analog conversion unit for driving different color display by a single physical Gamma circuit, without having to use a digital Gamma circuit. Therefore, gray scale loss caused by adjustment using the digital Gamma circuit can be avoided fundamentally.
Abstract:
A display panel optical compensating apparatus, a display panel and a display panel optical compensating method are provided. The display panel optical compensating apparatus comprises a storage unit (1), a data unit (2), a timing control unit (3) and a switch (4). When the switch (4) is in a first position, the timing control unit (3) has no data exchange with the storage unit (1), and the data unit (2) receives compensated data and burns the compensated data into the storage unit (1). When the switch (4) is in a second position, the timing control unit (3) reads the compensated data in the storage unit (1), performs a compensating operation on display data, and outputs compensated display data. The display panel optical compensating apparatus, the display panel and the display panel optical compensating method realize simple structure, flexible operation, high stability, and fast tempo, and are suitable for mass production.
Abstract:
There are disclosed a driving circuit of an organic light emitting display panel and an organic light emitting display apparatus. The driving circuit comprises: a power supply detection circuit configured to detect an operating state of an external input power supply, send a normal signal of power supply detection when it is determined that the external input power supply is in a normal state, and send a abnormal signal of power supply detection when it is determined that the external input power supply is in an abnormal state; a clock control circuit configured to convert a received video data into image data recognizable by the organic light emitting display panel and then output it to the organic light emitting display panel when the normal signal of power supply detection sent by the power supply detection circuit is received, and output image data of black picture to the organic light emitting display panel when the abnormal signal power supply detection sent by the power supply detection circuit is received. In this way, pixel charges accumulated on respective display pixels can be released, which avoids transistors inside the display pixels from producing stress, and finally avoids occurrence of shutdown image sticking due to power-down.
Abstract:
The embodiments of the present invention provide a display panel and a display apparatus having the display panel. The display panel includes: an array substrate, a printed circuit board, a chip on film. One end of the chip on film is attached to a connection region of the array substrate, and the other end of the chip on film is attached to the printed circuit board, and the surface of the chip on film disposed with a chip faces the array substrate, and the connection region is disposed at a side of the array substrate away from a light-emitting surface.
Abstract:
Embodiments of the invention provide a parallax barrier and a display device. The parallax barrier comprises: first and second substrates; liquid crystal, filled between the two substrates; a plurality of strip-like electrode units, disposed parallel to each other and at an interval on a side of the first substrate close to the liquid crystal; a first alignment layer, disposed above the strip-like electrode units; a second alignment layer, disposed on a surface of the second substrate opposed to the first substrate, wherein, a aligning direction of the first alignment layer is perpendicular to an extending direction of the strip-like electrode units, and aligning directions of the first and second alignment layer are opposite, wherein, after the strip-like electrode units are energized, the liquid crystal directly above the strip-like electrode units are rotated by an angle ranged from 85° to 95° in a plane parallel to the substrates.
Abstract:
A driving circuit, a driving method and a display apparatus are provided. The driving circuit comprises: a gate driving module; a timing control module; and a chamfered wave generating circuit, an input terminal thereof being connected with the timing control module, an output terminal thereof being connected with an input terminal of the gate driving module, and being configured to discharge a power supply voltage provided by a power supply of the display apparatus under an effect of a timing control signal output by the gate driving module, so that the gate driving module outputs a chamfered wave scanning signal. The display quality of the display apparatus can be improved.
Abstract:
A driving method for preventing image sticking of a display panel upon shutdown, and a display device. The method includes: receiving a shutdown signal; and adjusting driving signals of a sub-pixel circuit of the display panel, so as to reduce the voltage difference between a gate electrode and a source electrode of a driving transistor of the sub-pixel circuit, and hence allowing the display panel to enter an image sticking prevention mode. The method can prevent image sticking of the display panel at the time of shutdown and hence improve the display quality.
Abstract:
A read and write control circuit for a flash chip is disclosed which includes a timing control circuit for generating a read and write timing signal for the flash chip, and a first non-volatile memory for storing a plurality of flags corresponding to a plurality of blocks in the flash chip, each of the flags indicating whether a respective one of the blocks that corresponds thereto has been written to normally. Also disclosed is a read and write control method of a flash chip, as well as an AMOLED application circuit having the read and write control circuit for use in an electrical compensation mechanism.